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From: Richard Acayan <mailingradian@gmail.com>
To: Bjorn Andersson <andersson@kernel.org>,
	Linus Walleij <linusw@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Srinivas Kandagatla <srini@kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,
	devicetree@vger.kernel.org
Cc: Richard Acayan <mailingradian@gmail.com>
Subject: [PATCH v2 4/5] arm64: dts: qcom: sdm670: add lpi pinctrl
Date: Mon,  9 Mar 2026 21:24:45 -0400	[thread overview]
Message-ID: <20260310012446.32226-5-mailingradian@gmail.com> (raw)
In-Reply-To: <20260310012446.32226-1-mailingradian@gmail.com>

The Snapdragon 670 has a separate TLMM for audio pins. Add the device
node for it.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
---
 arch/arm64/boot/dts/qcom/sdm670.dtsi | 73 ++++++++++++++++++++++++++++
 1 file changed, 73 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
index 4879d29d63c2..e21d42483378 100644
--- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
@@ -2346,6 +2346,79 @@ lmh_cluster0: lmh@17d78800 {
 			interrupt-controller;
 			#interrupt-cells = <1>;
 		};
+
+		lpi_tlmm: pinctrl@62b40000 {
+			compatible = "qcom,sdm670-lpass-lpi-pinctrl";
+			reg = <0 0x62b40000 0 0x20000>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&lpi_tlmm 0 0 32>;
+
+			cdc_pdm_default: cdc-pdm-default-state {
+				clk-pins {
+					pins = "gpio18";
+					function = "slimbus_clk";
+					drive-strength = <4>;
+					output-low;
+				};
+
+				sync-pins {
+					pins = "gpio19";
+					function = "pdm_sync";
+					drive-strength = <4>;
+					output-low;
+				};
+
+				tx-pins {
+					pins = "gpio20";
+					function = "pdm_tx";
+					drive-strength = <8>;
+				};
+
+				rx-pins {
+					pins = "gpio21", "gpio23", "gpio25";
+					function = "pdm_rx";
+					drive-strength = <4>;
+					output-low;
+				};
+			};
+
+			cdc_comp_default: cdc-comp-default-state {
+				pins = "gpio22", "gpio24";
+				function = "comp_rx";
+				drive-strength = <4>;
+			};
+
+			cdc_dmic_default: cdc-dmic-default-state {
+				clk1-pins {
+					pins = "gpio26";
+					function = "dmic1_clk";
+					drive-strength = <8>;
+					output-high;
+				};
+
+				clk2-pins {
+					pins = "gpio28";
+					function = "dmic2_clk";
+					drive-strength = <8>;
+					output-high;
+				};
+
+				data1-pins {
+					pins = "gpio27";
+					function = "dmic1_data";
+					drive-strength = <8>;
+					input-enable;
+				};
+
+				data2-pins {
+					pins = "gpio29";
+					function = "dmic2_data";
+					drive-strength = <8>;
+					input-enable;
+				};
+			};
+		};
 	};
 
 	thermal-zones {
-- 
2.53.0


  parent reply	other threads:[~2026-03-10  1:24 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-10  1:24 [PATCH v2 0/5] SDM670 LPASS LPI pin controller support Richard Acayan
2026-03-10  1:24 ` [PATCH v2 1/5] dt-bindings: qcom: lpass-lpi-common: add reserved GPIOs property Richard Acayan
2026-03-10  9:00   ` Krzysztof Kozlowski
2026-03-10  1:24 ` [PATCH v2 2/5] dt-bindings: pinctrl: qcom: Add SDM670 LPASS LPI pinctrl Richard Acayan
2026-03-10  9:01   ` Krzysztof Kozlowski
2026-03-10  1:24 ` [PATCH v2 3/5] pinctrl: qcom: add sdm670 lpi tlmm Richard Acayan
2026-03-10 11:30   ` Konrad Dybcio
2026-03-10  1:24 ` Richard Acayan [this message]
2026-03-10  3:46   ` [PATCH v2 4/5] arm64: dts: qcom: sdm670: add lpi pinctrl Dmitry Baryshkov
2026-03-10  1:24 ` [PATCH v2 5/5] arm64: dts: qcom: sdm670-google: add reserved lpi gpios Richard Acayan
2026-03-10 11:26   ` Konrad Dybcio
2026-03-10  1:29 ` [PATCH v2 0/5] SDM670 LPASS LPI pin controller support Richard Acayan

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