* [PATCH V7 01/13] dt-bindings: PCI: fsl,imx6q-pcie: Add reset GPIO in Root Port node
2026-03-10 1:54 [PATCH V7 00/13] pci-imx6: Add support for parsing the reset property in new Root Port binding Sherry Sun
@ 2026-03-10 1:54 ` Sherry Sun
2026-03-10 1:54 ` [PATCH V7 02/13] PCI: host-generic: Add common helpers for parsing Root Port properties Sherry Sun
` (12 subsequent siblings)
13 siblings, 0 replies; 22+ messages in thread
From: Sherry Sun @ 2026-03-10 1:54 UTC (permalink / raw)
To: hongxing.zhu, l.stach, Frank.Li, bhelgaas, lpieralisi,
kwilczynski, mani, robh, krzk+dt, conor+dt, s.hauer, festevam
Cc: imx, kernel, linux-pci, linux-arm-kernel, devicetree,
linux-kernel
Update fsl,imx6q-pcie.yaml to include the standard reset-gpios property
for the Root Port node.
The reset-gpios property is already defined in pci-bus-common.yaml for
PERST#, so use it instead of the local reset-gpio property. Keep the
existing reset-gpio property in the bridge node for backward
compatibility, but mark it as deprecated.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
---
.../bindings/pci/fsl,imx6q-pcie.yaml | 32 +++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index 12a01f7a5744..d1a2526f43dc 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -59,16 +59,34 @@ properties:
- const: dma
reset-gpio:
+ deprecated: true
description: Should specify the GPIO for controlling the PCI bus device
reset signal. It's not polarity aware and defaults to active-low reset
sequence (L=reset state, H=operation state) (optional required).
+ This property is deprecated, instead of referencing this property from the
+ host bridge node, use the reset-gpios property from the root port node.
reset-gpio-active-high:
+ deprecated: true
description: If present then the reset sequence using the GPIO
specified in the "reset-gpio" property is reversed (H=reset state,
L=operation state) (optional required).
+ This property is deprecated along with the reset-gpio property above, use
+ the reset-gpios property from the root port node.
type: boolean
+ pcie@0:
+ description:
+ Describe the i.MX6 PCIe Root Port.
+ type: object
+ $ref: /schemas/pci/pci-pci-bridge.yaml#
+
+ properties:
+ reg:
+ maxItems: 1
+
+ unevaluatedProperties: false
+
required:
- compatible
- reg
@@ -229,6 +247,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/imx6qdl-clock.h>
+ #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
pcie: pcie@1ffc000 {
@@ -255,5 +274,18 @@ examples:
<&clks IMX6QDL_CLK_LVDS1_GATE>,
<&clks IMX6QDL_CLK_PCIE_REF_125M>;
clock-names = "pcie", "pcie_bus", "pcie_phy";
+
+ pcie_port0: pcie@0 {
+ compatible = "pciclass,0604";
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+
+ reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
+ };
};
...
--
2.37.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH V7 02/13] PCI: host-generic: Add common helpers for parsing Root Port properties
2026-03-10 1:54 [PATCH V7 00/13] pci-imx6: Add support for parsing the reset property in new Root Port binding Sherry Sun
2026-03-10 1:54 ` [PATCH V7 01/13] dt-bindings: PCI: fsl,imx6q-pcie: Add reset GPIO in Root Port node Sherry Sun
@ 2026-03-10 1:54 ` Sherry Sun
2026-03-10 18:28 ` Frank Li
2026-03-10 1:54 ` [PATCH V7 03/13] PCI: dwc: Parse Root Port nodes in dw_pcie_host_init() Sherry Sun
` (11 subsequent siblings)
13 siblings, 1 reply; 22+ messages in thread
From: Sherry Sun @ 2026-03-10 1:54 UTC (permalink / raw)
To: hongxing.zhu, l.stach, Frank.Li, bhelgaas, lpieralisi,
kwilczynski, mani, robh, krzk+dt, conor+dt, s.hauer, festevam
Cc: imx, kernel, linux-pci, linux-arm-kernel, devicetree,
linux-kernel
Introduce generic helper functions to parse Root Port device tree nodes
and extract common properties like reset GPIOs. This allows multiple
PCI host controller drivers to share the same parsing logic.
Define struct pci_host_port to hold common Root Port properties
(currently only reset GPIO descriptor) and add
pci_host_common_parse_ports() to parse Root Port nodes from device tree.
Also add the 'ports' list to struct pci_host_bridge for better maintain
parsed Root Port information.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
drivers/pci/controller/pci-host-common.c | 59 ++++++++++++++++++++++++
drivers/pci/controller/pci-host-common.h | 15 ++++++
drivers/pci/probe.c | 2 +
include/linux/pci.h | 1 +
4 files changed, 77 insertions(+)
diff --git a/drivers/pci/controller/pci-host-common.c b/drivers/pci/controller/pci-host-common.c
index d6258c1cffe5..de04686fc715 100644
--- a/drivers/pci/controller/pci-host-common.c
+++ b/drivers/pci/controller/pci-host-common.c
@@ -9,6 +9,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
+#include <linux/gpio/consumer.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_pci.h>
@@ -17,6 +18,64 @@
#include "pci-host-common.h"
+/**
+ * pci_host_common_parse_port - Parse a single Root Port node
+ * @dev: Device pointer
+ * @bridge: PCI host bridge
+ * @node: Device tree node of the Root Port
+ *
+ * Returns: 0 on success, negative error code on failure
+ */
+static int pci_host_common_parse_port(struct device *dev,
+ struct pci_host_bridge *bridge,
+ struct device_node *node)
+{
+ struct pci_host_port *port;
+ struct gpio_desc *reset;
+
+ reset = devm_fwnode_gpiod_get(dev, of_fwnode_handle(node),
+ "reset", GPIOD_ASIS, "PERST#");
+ if (IS_ERR(reset))
+ return PTR_ERR(reset);
+
+ port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL);
+ if (!port)
+ return -ENOMEM;
+
+ port->reset = reset;
+ INIT_LIST_HEAD(&port->list);
+ list_add_tail(&port->list, &bridge->ports);
+
+ return 0;
+}
+
+/**
+ * pci_host_common_parse_ports - Parse Root Port nodes from device tree
+ * @dev: Device pointer
+ * @bridge: PCI host bridge
+ *
+ * This function iterates through child nodes of the host bridge and parses
+ * Root Port properties (currently only reset GPIO).
+ *
+ * Returns: 0 on success, -ENOENT if no ports found, other negative error codes
+ * on failure
+ */
+int pci_host_common_parse_ports(struct device *dev, struct pci_host_bridge *bridge)
+{
+ int ret = -ENOENT;
+
+ for_each_available_child_of_node_scoped(dev->of_node, of_port) {
+ if (!of_node_is_type(of_port, "pci"))
+ continue;
+ ret = pci_host_common_parse_port(dev, bridge, of_port);
+ if (ret)
+ return ret;
+ }
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pci_host_common_parse_ports);
+
static void gen_pci_unmap_cfg(void *ptr)
{
pci_ecam_free((struct pci_config_window *)ptr);
diff --git a/drivers/pci/controller/pci-host-common.h b/drivers/pci/controller/pci-host-common.h
index b5075d4bd7eb..1de015d10b9f 100644
--- a/drivers/pci/controller/pci-host-common.h
+++ b/drivers/pci/controller/pci-host-common.h
@@ -12,6 +12,21 @@
struct pci_ecam_ops;
+/**
+ * struct pci_host_port - Generic Root Port properties
+ * @list: List node for linking multiple ports
+ * @reset: GPIO descriptor for PERST# signal
+ *
+ * This structure contains common properties that can be parsed from
+ * Root Port device tree nodes.
+ */
+struct pci_host_port {
+ struct list_head list;
+ struct gpio_desc *reset;
+};
+
+int pci_host_common_parse_ports(struct device *dev, struct pci_host_bridge *bridge);
+
int pci_host_common_probe(struct platform_device *pdev);
int pci_host_common_init(struct platform_device *pdev,
struct pci_host_bridge *bridge,
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index bccc7a4bdd79..9cc3f4ebb370 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -647,6 +647,7 @@ static void pci_release_host_bridge_dev(struct device *dev)
pci_free_resource_list(&bridge->windows);
pci_free_resource_list(&bridge->dma_ranges);
+ pci_free_resource_list(&bridge->ports);
/* Host bridges only have domain_nr set in the emulation case */
if (bridge->domain_nr != PCI_DOMAIN_NR_NOT_SET)
@@ -671,6 +672,7 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge)
{
INIT_LIST_HEAD(&bridge->windows);
INIT_LIST_HEAD(&bridge->dma_ranges);
+ INIT_LIST_HEAD(&bridge->ports);
/*
* We assume we can manage these PCIe features. Some systems may
diff --git a/include/linux/pci.h b/include/linux/pci.h
index c620d4b6c52e..926f75a20d7b 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -634,6 +634,7 @@ struct pci_host_bridge {
int domain_nr;
struct list_head windows; /* resource_entry */
struct list_head dma_ranges; /* dma ranges resource list */
+ struct list_head ports; /* Root Port list (pci_host_port) */
#ifdef CONFIG_PCI_IDE
u16 nr_ide_streams; /* Max streams possibly active in @ide_stream_ida */
struct ida ide_stream_ida;
--
2.37.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH V7 02/13] PCI: host-generic: Add common helpers for parsing Root Port properties
2026-03-10 1:54 ` [PATCH V7 02/13] PCI: host-generic: Add common helpers for parsing Root Port properties Sherry Sun
@ 2026-03-10 18:28 ` Frank Li
2026-03-11 10:03 ` Sherry Sun
0 siblings, 1 reply; 22+ messages in thread
From: Frank Li @ 2026-03-10 18:28 UTC (permalink / raw)
To: hongxing.zhu, l.stach, Frank.Li, bhelgaas, lpieralisi,
kwilczynski, mani, robh, krzk+dt, conor+dt, s.hauer, festevam
Cc: Frank Li, imx, kernel, linux-pci, linux-arm-kernel, devicetree,
linux-kernel
From: Frank Li (AI-BOT) <frank.li@nxp.com>
> +int pci_host_common_parse_ports(struct device *dev, struct pci_host_bridge *bridge)
> +{
> + int ret = -ENOENT;
> +
> + for_each_available_child_of_node_scoped(dev->of_node, of_port) {
> + if (!of_node_is_type(of_port, "pci"))
> + continue;
> + ret = pci_host_common_parse_port(dev, bridge, of_port);
> + if (ret)
> + return ret;
> + }
> +
> + return ret;
> +}
AI: Returning -ENOENT when no ports are found may be unexpected by callers.
Consider whether this should return 0 (success, zero ports parsed) or if
callers must explicitly handle -ENOENT. Document the semantics clearly.
> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index bccc7a4bdd79..9cc3f4ebb370 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -647,6 +647,7 @@ static void pci_release_host_bridge_dev(struct device *dev)
>
> pci_free_resource_list(&bridge->windows);
> pci_free_resource_list(&bridge->dma_ranges);
> + pci_free_resource_list(&bridge->ports);
AI: pci_free_resource_list() expects struct resource_entry nodes. The ports
list contains struct pci_host_port nodes. This will corrupt memory or
crash. Use list_for_each_entry_safe() with proper cleanup, or define a
dedicated pci_free_host_ports() function.
Frank
^ permalink raw reply [flat|nested] 22+ messages in thread* RE: [PATCH V7 02/13] PCI: host-generic: Add common helpers for parsing Root Port properties
2026-03-10 18:28 ` Frank Li
@ 2026-03-11 10:03 ` Sherry Sun
2026-03-11 15:47 ` Frank Li
0 siblings, 1 reply; 22+ messages in thread
From: Sherry Sun @ 2026-03-11 10:03 UTC (permalink / raw)
To: Frank Li, Hongxing Zhu, l.stach@pengutronix.de, Frank Li,
bhelgaas@google.com, lpieralisi@kernel.org,
kwilczynski@kernel.org, mani@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, s.hauer@pengutronix.de,
festevam@gmail.com
Cc: Frank Li, imx@lists.linux.dev, kernel@pengutronix.de,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
> From: Frank Li (AI-BOT) <frank.li@nxp.com>
>
> > +int pci_host_common_parse_ports(struct device *dev, struct
> > +pci_host_bridge *bridge) {
> > + int ret = -ENOENT;
> > +
> > + for_each_available_child_of_node_scoped(dev->of_node, of_port) {
> > + if (!of_node_is_type(of_port, "pci"))
> > + continue;
> > + ret = pci_host_common_parse_port(dev, bridge, of_port);
> > + if (ret)
> > + return ret;
> > + }
> > +
> > + return ret;
> > +}
>
> AI: Returning -ENOENT when no ports are found may be unexpected by
> callers.
> Consider whether this should return 0 (success, zero ports parsed) or if callers
> must explicitly handle -ENOENT. Document the semantics clearly.
>
Returning -ENOENT when no ports are found is intentional and aligns with the
design requirements for this use case. This pattern is common in the kernel where
parsing functions return -ENOENT when expected nodes/properties are missing.
1. -ENOENT semantically means "the expected entity was not found", which accurately
reflects the situation when no Root Port nodes exist in the device tree.
2. The callers of this function need to distinguish between:
- Success with ports found (return 0)
- No ports found in DT (-ENOENT) - this may be a DT configuration issue, for controllers
where ports are optional, they can explicitly check for -ENOENT and treat it as non-fatal.
- Actual parsing errors (other negative error codes like -ENOMEM, -EPROBE_DEFER)
> > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index
> > bccc7a4bdd79..9cc3f4ebb370 100644
> > --- a/drivers/pci/probe.c
> > +++ b/drivers/pci/probe.c
> > @@ -647,6 +647,7 @@ static void pci_release_host_bridge_dev(struct
> > device *dev)
> >
> > pci_free_resource_list(&bridge->windows);
> > pci_free_resource_list(&bridge->dma_ranges);
> > + pci_free_resource_list(&bridge->ports);
>
> AI: pci_free_resource_list() expects struct resource_entry nodes. The ports list
> contains struct pci_host_port nodes. This will corrupt memory or crash. Use
> list_for_each_entry_safe() with proper cleanup, or define a dedicated
> pci_free_host_ports() function.
Yes, thanks for catching this, pci_free_resource_list() expects struct resource_entry
nodes and cannot be used for struct pci_host_port nodes.
I will add back the cleanup function pci_host_common_delete_ports() in earlier version
patchset to properly handles the ports list.
Best regards,
Sherry
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH V7 02/13] PCI: host-generic: Add common helpers for parsing Root Port properties
2026-03-11 10:03 ` Sherry Sun
@ 2026-03-11 15:47 ` Frank Li
2026-03-12 2:04 ` Sherry Sun
0 siblings, 1 reply; 22+ messages in thread
From: Frank Li @ 2026-03-11 15:47 UTC (permalink / raw)
To: Sherry Sun
Cc: Hongxing Zhu, l.stach@pengutronix.de, bhelgaas@google.com,
lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
s.hauer@pengutronix.de, festevam@gmail.com, imx@lists.linux.dev,
kernel@pengutronix.de, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
On Wed, Mar 11, 2026 at 10:03:01AM +0000, Sherry Sun wrote:
> > From: Frank Li (AI-BOT) <frank.li@nxp.com>
> >
> > > +int pci_host_common_parse_ports(struct device *dev, struct
> > > +pci_host_bridge *bridge) {
> > > + int ret = -ENOENT;
> > > +
> > > + for_each_available_child_of_node_scoped(dev->of_node, of_port) {
> > > + if (!of_node_is_type(of_port, "pci"))
> > > + continue;
> > > + ret = pci_host_common_parse_port(dev, bridge, of_port);
> > > + if (ret)
> > > + return ret;
> > > + }
> > > +
> > > + return ret;
> > > +}
> >
> > AI: Returning -ENOENT when no ports are found may be unexpected by
> > callers.
> > Consider whether this should return 0 (success, zero ports parsed) or if callers
> > must explicitly handle -ENOENT. Document the semantics clearly.
> >
>
> Returning -ENOENT when no ports are found is intentional and aligns with the
> design requirements for this use case. This pattern is common in the kernel where
> parsing functions return -ENOENT when expected nodes/properties are missing.
>
> 1. -ENOENT semantically means "the expected entity was not found", which accurately
> reflects the situation when no Root Port nodes exist in the device tree.
> 2. The callers of this function need to distinguish between:
> - Success with ports found (return 0)
> - No ports found in DT (-ENOENT) - this may be a DT configuration issue, for controllers
> where ports are optional, they can explicitly check for -ENOENT and treat it as non-fatal.
> - Actual parsing errors (other negative error codes like -ENOMEM, -EPROBE_DEFER)
I think no ports under bridge should treat as 0. otherwise it may broken
other platform, which dt have not added child node yet.
Frank
>
> > > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index
> > > bccc7a4bdd79..9cc3f4ebb370 100644
> > > --- a/drivers/pci/probe.c
> > > +++ b/drivers/pci/probe.c
> > > @@ -647,6 +647,7 @@ static void pci_release_host_bridge_dev(struct
> > > device *dev)
> > >
> > > pci_free_resource_list(&bridge->windows);
> > > pci_free_resource_list(&bridge->dma_ranges);
> > > + pci_free_resource_list(&bridge->ports);
> >
> > AI: pci_free_resource_list() expects struct resource_entry nodes. The ports list
> > contains struct pci_host_port nodes. This will corrupt memory or crash. Use
> > list_for_each_entry_safe() with proper cleanup, or define a dedicated
> > pci_free_host_ports() function.
>
> Yes, thanks for catching this, pci_free_resource_list() expects struct resource_entry
> nodes and cannot be used for struct pci_host_port nodes.
> I will add back the cleanup function pci_host_common_delete_ports() in earlier version
> patchset to properly handles the ports list.
>
> Best regards,
> Sherry
^ permalink raw reply [flat|nested] 22+ messages in thread* RE: [PATCH V7 02/13] PCI: host-generic: Add common helpers for parsing Root Port properties
2026-03-11 15:47 ` Frank Li
@ 2026-03-12 2:04 ` Sherry Sun
0 siblings, 0 replies; 22+ messages in thread
From: Sherry Sun @ 2026-03-12 2:04 UTC (permalink / raw)
To: Frank Li
Cc: Hongxing Zhu, l.stach@pengutronix.de, bhelgaas@google.com,
lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
s.hauer@pengutronix.de, festevam@gmail.com, imx@lists.linux.dev,
kernel@pengutronix.de, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
> Subject: Re: [PATCH V7 02/13] PCI: host-generic: Add common helpers for
> parsing Root Port properties
>
> On Wed, Mar 11, 2026 at 10:03:01AM +0000, Sherry Sun wrote:
> > > From: Frank Li (AI-BOT) <frank.li@nxp.com>
> > >
> > > > +int pci_host_common_parse_ports(struct device *dev, struct
> > > > +pci_host_bridge *bridge) {
> > > > + int ret = -ENOENT;
> > > > +
> > > > + for_each_available_child_of_node_scoped(dev->of_node, of_port) {
> > > > + if (!of_node_is_type(of_port, "pci"))
> > > > + continue;
> > > > + ret = pci_host_common_parse_port(dev, bridge, of_port);
> > > > + if (ret)
> > > > + return ret;
> > > > + }
> > > > +
> > > > + return ret;
> > > > +}
> > >
> > > AI: Returning -ENOENT when no ports are found may be unexpected by
> > > callers.
> > > Consider whether this should return 0 (success, zero ports parsed)
> > > or if callers must explicitly handle -ENOENT. Document the semantics
> clearly.
> > >
> >
> > Returning -ENOENT when no ports are found is intentional and aligns
> > with the design requirements for this use case. This pattern is common
> > in the kernel where parsing functions return -ENOENT when expected
> nodes/properties are missing.
> >
> > 1. -ENOENT semantically means "the expected entity was not found", which
> accurately
> > reflects the situation when no Root Port nodes exist in the device tree.
> > 2. The callers of this function need to distinguish between:
> > - Success with ports found (return 0)
> > - No ports found in DT (-ENOENT) - this may be a DT configuration issue,
> for controllers
> > where ports are optional, they can explicitly check for -ENOENT and treat
> it as non-fatal.
> > - Actual parsing errors (other negative error codes like -ENOMEM,
> > -EPROBE_DEFER)
>
> I think no ports under bridge should treat as 0. otherwise it may broken other
> platform, which dt have not added child node yet.
>
Hi Frank, no, it will not break the old platforms, the caller will explicitly check for
-ENOENT and treat it as non-fatal for such optional properties. You can check my patch#3.
This is a common behavior in linux, for example, we also do the same check when
calling devm_regulator_get_optional() or devm_pm_opp_of_add_table().
@@ -581,6 +582,13 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
pp->bridge = bridge;
+ /* Parse Root Port nodes if present */
+ ret = pci_host_common_parse_ports(dev, bridge);
+ if (ret && ret != -ENOENT) {
+ dev_err(dev, "Failed to parse Root Port nodes: %d\n", ret);
+ return ret;
+ }
Best Regards
Sherry
> Frank
>
> >
> > > > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index
> > > > bccc7a4bdd79..9cc3f4ebb370 100644
> > > > --- a/drivers/pci/probe.c
> > > > +++ b/drivers/pci/probe.c
> > > > @@ -647,6 +647,7 @@ static void pci_release_host_bridge_dev(struct
> > > > device *dev)
> > > >
> > > > pci_free_resource_list(&bridge->windows);
> > > > pci_free_resource_list(&bridge->dma_ranges);
> > > > + pci_free_resource_list(&bridge->ports);
> > >
> > > AI: pci_free_resource_list() expects struct resource_entry nodes.
> > > The ports list contains struct pci_host_port nodes. This will
> > > corrupt memory or crash. Use
> > > list_for_each_entry_safe() with proper cleanup, or define a
> > > dedicated
> > > pci_free_host_ports() function.
> >
> > Yes, thanks for catching this, pci_free_resource_list() expects struct
> > resource_entry nodes and cannot be used for struct pci_host_port nodes.
> > I will add back the cleanup function pci_host_common_delete_ports() in
> > earlier version patchset to properly handles the ports list.
> >
> > Best regards,
> > Sherry
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH V7 03/13] PCI: dwc: Parse Root Port nodes in dw_pcie_host_init()
2026-03-10 1:54 [PATCH V7 00/13] pci-imx6: Add support for parsing the reset property in new Root Port binding Sherry Sun
2026-03-10 1:54 ` [PATCH V7 01/13] dt-bindings: PCI: fsl,imx6q-pcie: Add reset GPIO in Root Port node Sherry Sun
2026-03-10 1:54 ` [PATCH V7 02/13] PCI: host-generic: Add common helpers for parsing Root Port properties Sherry Sun
@ 2026-03-10 1:54 ` Sherry Sun
2026-03-10 1:54 ` [PATCH V7 04/13] PCI: imx6: Assert PERST# before enabling regulators Sherry Sun
` (10 subsequent siblings)
13 siblings, 0 replies; 22+ messages in thread
From: Sherry Sun @ 2026-03-10 1:54 UTC (permalink / raw)
To: hongxing.zhu, l.stach, Frank.Li, bhelgaas, lpieralisi,
kwilczynski, mani, robh, krzk+dt, conor+dt, s.hauer, festevam
Cc: imx, kernel, linux-pci, linux-arm-kernel, devicetree,
linux-kernel
Add support for parsing Root Port child nodes in dw_pcie_host_init()
using pci_host_common_parse_ports(). This allows DWC-based drivers to
specify Root Port properties (like reset GPIOs) in individual Root Port
nodes rather than in the host bridge node.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
drivers/pci/controller/dwc/pcie-designware-host.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index ba183fc3e77c..c9c06b82ad6b 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -20,6 +20,7 @@
#include <linux/platform_device.h>
#include "../../pci.h"
+#include "../pci-host-common.h"
#include "pcie-designware.h"
static struct pci_ops dw_pcie_ops;
@@ -581,6 +582,13 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
pp->bridge = bridge;
+ /* Parse Root Port nodes if present */
+ ret = pci_host_common_parse_ports(dev, bridge);
+ if (ret && ret != -ENOENT) {
+ dev_err(dev, "Failed to parse Root Port nodes: %d\n", ret);
+ return ret;
+ }
+
ret = dw_pcie_host_get_resources(pp);
if (ret)
return ret;
--
2.37.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH V7 04/13] PCI: imx6: Assert PERST# before enabling regulators
2026-03-10 1:54 [PATCH V7 00/13] pci-imx6: Add support for parsing the reset property in new Root Port binding Sherry Sun
` (2 preceding siblings ...)
2026-03-10 1:54 ` [PATCH V7 03/13] PCI: dwc: Parse Root Port nodes in dw_pcie_host_init() Sherry Sun
@ 2026-03-10 1:54 ` Sherry Sun
2026-03-10 15:23 ` Frank Li
2026-03-10 1:54 ` [PATCH V7 05/13] PCI: imx6: Add support for parsing the reset property in new Root Port binding Sherry Sun
` (9 subsequent siblings)
13 siblings, 1 reply; 22+ messages in thread
From: Sherry Sun @ 2026-03-10 1:54 UTC (permalink / raw)
To: hongxing.zhu, l.stach, Frank.Li, bhelgaas, lpieralisi,
kwilczynski, mani, robh, krzk+dt, conor+dt, s.hauer, festevam
Cc: imx, kernel, linux-pci, linux-arm-kernel, devicetree,
linux-kernel
According to the PCIe initialization requirements, PERST# signal should
be asserted before applying power to the PCIe device, and deasserted
after power and reference clock are stable.
Currently, the driver enables the vpcie3v3aux regulator in
imx_pcie_probe() before PERST# is asserted in imx_pcie_host_init(),
which violates the PCIe power sequencing requirements. However, there
is no issue so far because PERST# is requested as GPIOD_OUT_HIGH in
imx_pcie_probe(), which guarantees that PERST# is asserted before
enabling the vpcie3v3aux regulator.
This is a preparation patch for the upcoming changes that will parse the
reset property using the new Root Port binding, which will use
GPIOD_ASIS when requesting the reset GPIO. With GPIOD_ASIS, the GPIO
state is not guaranteed, so explicit sequencing is required.
Fix the power sequencing by:
1. Moving vpcie3v3aux regulator enable from probe to
imx_pcie_host_init(), where it can be properly sequenced with PERST#.
2. Moving imx_pcie_assert_perst() before regulator and clock enable to
ensure correct ordering.
The vpcie3v3aux regulator is kept enabled for the entire PCIe controller
lifecycle and automatically disabled on device removal via devm cleanup.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 55 ++++++++++++++++++++-------
1 file changed, 42 insertions(+), 13 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index d80d3be28ee5..fbaad35e43a9 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -166,6 +166,8 @@ struct imx_pcie {
u32 tx_swing_full;
u32 tx_swing_low;
struct regulator *vpcie;
+ struct regulator *vpcie_aux;
+ bool vpcie_aux_enabled;
struct regulator *vph;
void __iomem *phy_base;
@@ -1220,6 +1222,13 @@ static void imx_pcie_disable_device(struct pci_host_bridge *bridge,
imx_pcie_remove_lut(imx_pcie, pci_dev_id(pdev));
}
+static void imx_pcie_vpcie_aux_disable(void *data)
+{
+ struct regulator *vpcie_aux = data;
+
+ regulator_disable(vpcie_aux);
+}
+
static void imx_pcie_assert_perst(struct imx_pcie *imx_pcie, bool assert)
{
if (assert) {
@@ -1240,6 +1249,29 @@ static int imx_pcie_host_init(struct dw_pcie_rp *pp)
struct imx_pcie *imx_pcie = to_imx_pcie(pci);
int ret;
+ if (pp->bridge && imx_check_flag(imx_pcie, IMX_PCIE_FLAG_HAS_LUT)) {
+ pp->bridge->enable_device = imx_pcie_enable_device;
+ pp->bridge->disable_device = imx_pcie_disable_device;
+ }
+
+ imx_pcie_assert_perst(imx_pcie, true);
+
+ /* Keep 3.3Vaux supply enabled for the entire PCIe controller lifecycle */
+ if (imx_pcie->vpcie_aux && !imx_pcie->vpcie_aux_enabled) {
+ ret = regulator_enable(imx_pcie->vpcie_aux);
+ if (ret) {
+ dev_err(dev, "failed to enable vpcie_aux regulator: %d\n",
+ ret);
+ return ret;
+ }
+ imx_pcie->vpcie_aux_enabled = true;
+
+ ret = devm_add_action_or_reset(dev, imx_pcie_vpcie_aux_disable,
+ imx_pcie->vpcie_aux);
+ if (ret)
+ return ret;
+ }
+
if (imx_pcie->vpcie) {
ret = regulator_enable(imx_pcie->vpcie);
if (ret) {
@@ -1249,25 +1281,19 @@ static int imx_pcie_host_init(struct dw_pcie_rp *pp)
}
}
- if (pp->bridge && imx_check_flag(imx_pcie, IMX_PCIE_FLAG_HAS_LUT)) {
- pp->bridge->enable_device = imx_pcie_enable_device;
- pp->bridge->disable_device = imx_pcie_disable_device;
+ ret = imx_pcie_clk_enable(imx_pcie);
+ if (ret) {
+ dev_err(dev, "unable to enable pcie clocks: %d\n", ret);
+ goto err_reg_disable;
}
imx_pcie_assert_core_reset(imx_pcie);
- imx_pcie_assert_perst(imx_pcie, true);
if (imx_pcie->drvdata->init_phy)
imx_pcie->drvdata->init_phy(imx_pcie);
imx_pcie_configure_type(imx_pcie);
- ret = imx_pcie_clk_enable(imx_pcie);
- if (ret) {
- dev_err(dev, "unable to enable pcie clocks: %d\n", ret);
- goto err_reg_disable;
- }
-
if (imx_pcie->phy) {
ret = phy_init(imx_pcie->phy);
if (ret) {
@@ -1790,9 +1816,12 @@ static int imx_pcie_probe(struct platform_device *pdev)
of_property_read_u32(node, "fsl,max-link-speed", &pci->max_link_speed);
imx_pcie->supports_clkreq = of_property_read_bool(node, "supports-clkreq");
- ret = devm_regulator_get_enable_optional(&pdev->dev, "vpcie3v3aux");
- if (ret < 0 && ret != -ENODEV)
- return dev_err_probe(dev, ret, "failed to enable Vaux supply\n");
+ imx_pcie->vpcie_aux = devm_regulator_get_optional(&pdev->dev, "vpcie3v3aux");
+ if (IS_ERR(imx_pcie->vpcie_aux)) {
+ if (PTR_ERR(imx_pcie->vpcie_aux) != -ENODEV)
+ return PTR_ERR(imx_pcie->vpcie_aux);
+ imx_pcie->vpcie_aux = NULL;
+ }
imx_pcie->vpcie = devm_regulator_get_optional(&pdev->dev, "vpcie");
if (IS_ERR(imx_pcie->vpcie)) {
--
2.37.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH V7 04/13] PCI: imx6: Assert PERST# before enabling regulators
2026-03-10 1:54 ` [PATCH V7 04/13] PCI: imx6: Assert PERST# before enabling regulators Sherry Sun
@ 2026-03-10 15:23 ` Frank Li
2026-03-11 7:09 ` Sherry Sun
0 siblings, 1 reply; 22+ messages in thread
From: Frank Li @ 2026-03-10 15:23 UTC (permalink / raw)
To: Sherry Sun
Cc: hongxing.zhu, l.stach, bhelgaas, lpieralisi, kwilczynski, mani,
robh, krzk+dt, conor+dt, s.hauer, festevam, imx, kernel,
linux-pci, linux-arm-kernel, devicetree, linux-kernel
On Tue, Mar 10, 2026 at 09:54:17AM +0800, Sherry Sun wrote:
> According to the PCIe initialization requirements, PERST# signal should
> be asserted before applying power to the PCIe device, and deasserted
> after power and reference clock are stable.
>
> Currently, the driver enables the vpcie3v3aux regulator in
> imx_pcie_probe() before PERST# is asserted in imx_pcie_host_init(),
> which violates the PCIe power sequencing requirements. However, there
> is no issue so far because PERST# is requested as GPIOD_OUT_HIGH in
> imx_pcie_probe(), which guarantees that PERST# is asserted before
> enabling the vpcie3v3aux regulator.
>
> This is a preparation patch for the upcoming changes that will parse the
Nit: This is prepare for ...
> reset property using the new Root Port binding, which will use
> GPIOD_ASIS when requesting the reset GPIO. With GPIOD_ASIS, the GPIO
> state is not guaranteed, so explicit sequencing is required.
>
> Fix the power sequencing by:
> 1. Moving vpcie3v3aux regulator enable from probe to
> imx_pcie_host_init(), where it can be properly sequenced with PERST#.
> 2. Moving imx_pcie_assert_perst() before regulator and clock enable to
> ensure correct ordering.
>
> The vpcie3v3aux regulator is kept enabled for the entire PCIe controller
> lifecycle and automatically disabled on device removal via devm cleanup.
>
> Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
> ---
...
> static void imx_pcie_assert_perst(struct imx_pcie *imx_pcie, bool assert)
> {
> if (assert) {
> @@ -1240,6 +1249,29 @@ static int imx_pcie_host_init(struct dw_pcie_rp *pp)
> struct imx_pcie *imx_pcie = to_imx_pcie(pci);
> int ret;
>
> + if (pp->bridge && imx_check_flag(imx_pcie, IMX_PCIE_FLAG_HAS_LUT)) {
> + pp->bridge->enable_device = imx_pcie_enable_device;
> + pp->bridge->disable_device = imx_pcie_disable_device;
> + }
are you sure need move this part? it is not related preset and vaux.
> +
> + imx_pcie_assert_perst(imx_pcie, true);
> +
> + /* Keep 3.3Vaux supply enabled for the entire PCIe controller lifecycle */
> + if (imx_pcie->vpcie_aux && !imx_pcie->vpcie_aux_enabled) {
How about two pcie shared one vaux regulator?
...
> if (ret) {
> @@ -1790,9 +1816,12 @@ static int imx_pcie_probe(struct platform_device *pdev)
> of_property_read_u32(node, "fsl,max-link-speed", &pci->max_link_speed);
> imx_pcie->supports_clkreq = of_property_read_bool(node, "supports-clkreq");
>
> - ret = devm_regulator_get_enable_optional(&pdev->dev, "vpcie3v3aux");
> - if (ret < 0 && ret != -ENODEV)
> - return dev_err_probe(dev, ret, "failed to enable Vaux supply\n");
> + imx_pcie->vpcie_aux = devm_regulator_get_optional(&pdev->dev, "vpcie3v3aux");
> + if (IS_ERR(imx_pcie->vpcie_aux)) {
> + if (PTR_ERR(imx_pcie->vpcie_aux) != -ENODEV)
> + return PTR_ERR(imx_pcie->vpcie_aux);
keep old dev_err_probe(), just message change to "failed to get Vaux supply".
Frnak
> + imx_pcie->vpcie_aux = NULL;
> + }
>
> imx_pcie->vpcie = devm_regulator_get_optional(&pdev->dev, "vpcie");
> if (IS_ERR(imx_pcie->vpcie)) {
> --
> 2.37.1
>
^ permalink raw reply [flat|nested] 22+ messages in thread* RE: [PATCH V7 04/13] PCI: imx6: Assert PERST# before enabling regulators
2026-03-10 15:23 ` Frank Li
@ 2026-03-11 7:09 ` Sherry Sun
0 siblings, 0 replies; 22+ messages in thread
From: Sherry Sun @ 2026-03-11 7:09 UTC (permalink / raw)
To: Frank Li
Cc: Hongxing Zhu, l.stach@pengutronix.de, bhelgaas@google.com,
lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
s.hauer@pengutronix.de, festevam@gmail.com, imx@lists.linux.dev,
kernel@pengutronix.de, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
> On Tue, Mar 10, 2026 at 09:54:17AM +0800, Sherry Sun wrote:
> > According to the PCIe initialization requirements, PERST# signal
> > should be asserted before applying power to the PCIe device, and
> > deasserted after power and reference clock are stable.
> >
> > Currently, the driver enables the vpcie3v3aux regulator in
> > imx_pcie_probe() before PERST# is asserted in imx_pcie_host_init(),
> > which violates the PCIe power sequencing requirements. However, there
> > is no issue so far because PERST# is requested as GPIOD_OUT_HIGH in
> > imx_pcie_probe(), which guarantees that PERST# is asserted before
> > enabling the vpcie3v3aux regulator.
> >
> > This is a preparation patch for the upcoming changes that will parse
> > the
>
> Nit: This is prepare for ...
Ok, will fix it.
>
> > reset property using the new Root Port binding, which will use
> > GPIOD_ASIS when requesting the reset GPIO. With GPIOD_ASIS, the GPIO
> > state is not guaranteed, so explicit sequencing is required.
> >
> > Fix the power sequencing by:
> > 1. Moving vpcie3v3aux regulator enable from probe to
> > imx_pcie_host_init(), where it can be properly sequenced with PERST#.
> > 2. Moving imx_pcie_assert_perst() before regulator and clock enable to
> > ensure correct ordering.
> >
> > The vpcie3v3aux regulator is kept enabled for the entire PCIe
> > controller lifecycle and automatically disabled on device removal via devm
> cleanup.
> >
> > Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
> > ---
> ...
> > static void imx_pcie_assert_perst(struct imx_pcie *imx_pcie, bool
> > assert) {
> > if (assert) {
> > @@ -1240,6 +1249,29 @@ static int imx_pcie_host_init(struct dw_pcie_rp
> *pp)
> > struct imx_pcie *imx_pcie = to_imx_pcie(pci);
> > int ret;
> >
> > + if (pp->bridge && imx_check_flag(imx_pcie,
> IMX_PCIE_FLAG_HAS_LUT)) {
> > + pp->bridge->enable_device = imx_pcie_enable_device;
> > + pp->bridge->disable_device = imx_pcie_disable_device;
> > + }
>
> are you sure need move this part? it is not related preset and vaux.
Yes, from code logic, no need to move this, I do this just to makes the code
"asser perst -> enable regulartor -> enable clk -> deassert perst" look cleaner.
If moving irrelevant code is not recommended, I can remove this part of the change.
>
> > +
> > + imx_pcie_assert_perst(imx_pcie, true);
> > +
> > + /* Keep 3.3Vaux supply enabled for the entire PCIe controller lifecycle
> */
> > + if (imx_pcie->vpcie_aux && !imx_pcie->vpcie_aux_enabled) {
>
> How about two pcie shared one vaux regulator?
Currently, both vpcie_aux and vpcie are enabled in imx_pcie_host_init(), this function
is called not only during probe but also during system resume. Since we need to keep
the 3.3Vaux power enabled for the entire PCIe controller lifecycle, we hope vpcie_aux
to be enabled only once during probe, so this flag is added to prevent it from being
touched during system resume.
>
> ...
> > if (ret) {
> > @@ -1790,9 +1816,12 @@ static int imx_pcie_probe(struct platform_device
> *pdev)
> > of_property_read_u32(node, "fsl,max-link-speed", &pci-
> >max_link_speed);
> > imx_pcie->supports_clkreq = of_property_read_bool(node,
> > "supports-clkreq");
> >
> > - ret = devm_regulator_get_enable_optional(&pdev->dev,
> "vpcie3v3aux");
> > - if (ret < 0 && ret != -ENODEV)
> > - return dev_err_probe(dev, ret, "failed to enable Vaux
> supply\n");
> > + imx_pcie->vpcie_aux = devm_regulator_get_optional(&pdev->dev,
> "vpcie3v3aux");
> > + if (IS_ERR(imx_pcie->vpcie_aux)) {
> > + if (PTR_ERR(imx_pcie->vpcie_aux) != -ENODEV)
> > + return PTR_ERR(imx_pcie->vpcie_aux);
>
> keep old dev_err_probe(), just message change to "failed to get Vaux supply".
This is done to keep the same code style with vpcie and vph regulator in current code.
imx_pcie->vpcie = devm_regulator_get_optional(&pdev->dev, "vpcie");
if (IS_ERR(imx_pcie->vpcie)) {
if (PTR_ERR(imx_pcie->vpcie) != -ENODEV)
return PTR_ERR(imx_pcie->vpcie);
imx_pcie->vpcie = NULL;
}
imx_pcie->vph = devm_regulator_get_optional(&pdev->dev, "vph");
if (IS_ERR(imx_pcie->vph)) {
if (PTR_ERR(imx_pcie->vph) != -ENODEV)
return PTR_ERR(imx_pcie->vph);
imx_pcie->vph = NULL;
}
Best Regards
Sherry
>
> Frnak
> > + imx_pcie->vpcie_aux = NULL;
> > + }
> >
> > imx_pcie->vpcie = devm_regulator_get_optional(&pdev->dev,
> "vpcie");
> > if (IS_ERR(imx_pcie->vpcie)) {
> > --
> > 2.37.1
> >
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH V7 05/13] PCI: imx6: Add support for parsing the reset property in new Root Port binding
2026-03-10 1:54 [PATCH V7 00/13] pci-imx6: Add support for parsing the reset property in new Root Port binding Sherry Sun
` (3 preceding siblings ...)
2026-03-10 1:54 ` [PATCH V7 04/13] PCI: imx6: Assert PERST# before enabling regulators Sherry Sun
@ 2026-03-10 1:54 ` Sherry Sun
2026-03-10 1:54 ` [PATCH V7 06/13] arm: dts: imx6qdl: Add Root Port node and PERST property Sherry Sun
` (8 subsequent siblings)
13 siblings, 0 replies; 22+ messages in thread
From: Sherry Sun @ 2026-03-10 1:54 UTC (permalink / raw)
To: hongxing.zhu, l.stach, Frank.Li, bhelgaas, lpieralisi,
kwilczynski, mani, robh, krzk+dt, conor+dt, s.hauer, festevam
Cc: imx, kernel, linux-pci, linux-arm-kernel, devicetree,
linux-kernel
The current DT binding for pci-imx6 specifies the 'reset-gpios' property
in the host bridge node. However, the PERST# signal logically belongs to
individual Root Ports rather than the host bridge itself. This becomes
important when supporting PCIe KeyE connector and PCI power control
framework for pci-imx6 driver, which requires properties to be specified
in Root Port nodes.
With the common Root Port parsing now handled in dw_pcie_host_init(),
update the reset GPIO handling to use the parsed port list from
bridge->ports. To maintain DT backwards compatibility, fallback to the
legacy method of parsing the host bridge node if the reset property is
not present in the Root Port node (indicated by an empty ports list).
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 74 +++++++++++++++++++++------
1 file changed, 59 insertions(+), 15 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index fbaad35e43a9..26de892b48e4 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -34,6 +34,7 @@
#include <linux/pm_runtime.h>
#include "../../pci.h"
+#include "../pci-host-common.h"
#include "pcie-designware.h"
#define IMX8MQ_GPR_PCIE_REF_USE_PAD BIT(9)
@@ -150,7 +151,6 @@ struct imx_lut_data {
struct imx_pcie {
struct dw_pcie *pci;
- struct gpio_desc *reset_gpiod;
struct clk_bulk_data *clks;
int num_clks;
bool supports_clkreq;
@@ -1222,6 +1222,44 @@ static void imx_pcie_disable_device(struct pci_host_bridge *bridge,
imx_pcie_remove_lut(imx_pcie, pci_dev_id(pdev));
}
+static int imx_pcie_parse_legacy_binding(struct imx_pcie *pcie)
+{
+ struct device *dev = pcie->pci->dev;
+ struct pci_host_bridge *bridge = pcie->pci->pp.bridge;
+ struct pci_host_port *port;
+ struct gpio_desc *reset;
+
+ if (!bridge) {
+ dev_err(dev, "Bridge not allocated yet\n");
+ return -EINVAL;
+ }
+
+ /*
+ * For DT backward compatibility: if no Root Port nodes were parsed
+ * (indicated by empty ports list), parse reset-gpios from the host
+ * bridge node.
+ */
+ if (!list_empty(&bridge->ports))
+ return 0;
+
+ reset = devm_gpiod_get_optional(dev, "reset", GPIOD_ASIS);
+ if (IS_ERR(reset))
+ return PTR_ERR(reset);
+
+ if (!reset)
+ return 0;
+
+ port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL);
+ if (!port)
+ return -ENOMEM;
+
+ port->reset = reset;
+ INIT_LIST_HEAD(&port->list);
+ list_add_tail(&port->list, &bridge->ports);
+
+ return 0;
+}
+
static void imx_pcie_vpcie_aux_disable(void *data)
{
struct regulator *vpcie_aux = data;
@@ -1231,13 +1269,22 @@ static void imx_pcie_vpcie_aux_disable(void *data)
static void imx_pcie_assert_perst(struct imx_pcie *imx_pcie, bool assert)
{
- if (assert) {
- gpiod_set_value_cansleep(imx_pcie->reset_gpiod, 1);
- } else {
- if (imx_pcie->reset_gpiod) {
- msleep(PCIE_T_PVPERL_MS);
- gpiod_set_value_cansleep(imx_pcie->reset_gpiod, 0);
- msleep(PCIE_RESET_CONFIG_WAIT_MS);
+ struct dw_pcie *pci = imx_pcie->pci;
+ struct pci_host_bridge *bridge = pci->pp.bridge;
+ struct pci_host_port *port;
+
+ if (!bridge)
+ return;
+
+ list_for_each_entry(port, &bridge->ports, list) {
+ if (assert) {
+ gpiod_set_value_cansleep(port->reset, 1);
+ } else {
+ if (port->reset) {
+ msleep(PCIE_T_PVPERL_MS);
+ gpiod_set_value_cansleep(port->reset, 0);
+ msleep(PCIE_RESET_CONFIG_WAIT_MS);
+ }
}
}
}
@@ -1254,6 +1301,10 @@ static int imx_pcie_host_init(struct dw_pcie_rp *pp)
pp->bridge->disable_device = imx_pcie_disable_device;
}
+ ret = imx_pcie_parse_legacy_binding(imx_pcie);
+ if (ret)
+ return ret;
+
imx_pcie_assert_perst(imx_pcie, true);
/* Keep 3.3Vaux supply enabled for the entire PCIe controller lifecycle */
@@ -1712,13 +1763,6 @@ static int imx_pcie_probe(struct platform_device *pdev)
return PTR_ERR(imx_pcie->phy_base);
}
- /* Fetch GPIOs */
- imx_pcie->reset_gpiod = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
- if (IS_ERR(imx_pcie->reset_gpiod))
- return dev_err_probe(dev, PTR_ERR(imx_pcie->reset_gpiod),
- "unable to get reset gpio\n");
- gpiod_set_consumer_name(imx_pcie->reset_gpiod, "PCIe reset");
-
/* Fetch clocks */
imx_pcie->num_clks = devm_clk_bulk_get_all(dev, &imx_pcie->clks);
if (imx_pcie->num_clks < 0)
--
2.37.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH V7 06/13] arm: dts: imx6qdl: Add Root Port node and PERST property
2026-03-10 1:54 [PATCH V7 00/13] pci-imx6: Add support for parsing the reset property in new Root Port binding Sherry Sun
` (4 preceding siblings ...)
2026-03-10 1:54 ` [PATCH V7 05/13] PCI: imx6: Add support for parsing the reset property in new Root Port binding Sherry Sun
@ 2026-03-10 1:54 ` Sherry Sun
2026-03-10 1:54 ` [PATCH V7 07/13] arm: dts: imx6sx: " Sherry Sun
` (7 subsequent siblings)
13 siblings, 0 replies; 22+ messages in thread
From: Sherry Sun @ 2026-03-10 1:54 UTC (permalink / raw)
To: hongxing.zhu, l.stach, Frank.Li, bhelgaas, lpieralisi,
kwilczynski, mani, robh, krzk+dt, conor+dt, s.hauer, festevam
Cc: imx, kernel, linux-pci, linux-arm-kernel, devicetree,
linux-kernel
Since describing the PCIe PERST# property under Host Bridge node is now
deprecated, it is recommended to add it to the Root Port node, so
creating the Root Port node and add the reset-gpios property in Root
Port.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi | 5 +++++
arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi | 11 +++++++++++
arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts | 5 +++++
3 files changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi
index ba29720e3f72..fe9046c03ddd 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi
@@ -754,11 +754,16 @@ lvds0_out: endpoint {
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
+ /* This property is deprecated, use reset-gpios from the Root Port node. */
reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
vpcie-supply = <®_pcie>;
status = "okay";
};
+&pcie_port0 {
+ reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
+};
+
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi
index 76e6043e1f91..eeb376193398 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi
@@ -289,6 +289,17 @@ pcie: pcie@1ffc000 {
<&clks IMX6QDL_CLK_PCIE_REF_125M>;
clock-names = "pcie", "pcie_bus", "pcie_phy";
status = "disabled";
+
+ pcie_port0: pcie@0 {
+ compatible = "pciclass,0604";
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
};
aips1: bus@2000000 { /* AIPS1 */
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts b/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts
index c5b220aeaefd..6b12cab7175f 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts
@@ -45,10 +45,15 @@ MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
};
&pcie {
+ /* This property is deprecated, use reset-gpios from the Root Port node. */
reset-gpio = <&max7310_c 5 GPIO_ACTIVE_LOW>;
status = "okay";
};
+&pcie_port0 {
+ reset-gpios = <&max7310_c 5 GPIO_ACTIVE_LOW>;
+};
+
&sata {
status = "okay";
};
--
2.37.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH V7 07/13] arm: dts: imx6sx: Add Root Port node and PERST property
2026-03-10 1:54 [PATCH V7 00/13] pci-imx6: Add support for parsing the reset property in new Root Port binding Sherry Sun
` (5 preceding siblings ...)
2026-03-10 1:54 ` [PATCH V7 06/13] arm: dts: imx6qdl: Add Root Port node and PERST property Sherry Sun
@ 2026-03-10 1:54 ` Sherry Sun
2026-03-10 1:54 ` [PATCH V7 08/13] arm: dts: imx7d: " Sherry Sun
` (6 subsequent siblings)
13 siblings, 0 replies; 22+ messages in thread
From: Sherry Sun @ 2026-03-10 1:54 UTC (permalink / raw)
To: hongxing.zhu, l.stach, Frank.Li, bhelgaas, lpieralisi,
kwilczynski, mani, robh, krzk+dt, conor+dt, s.hauer, festevam
Cc: imx, kernel, linux-pci, linux-arm-kernel, devicetree,
linux-kernel
Since describing the PCIe PERST# property under Host Bridge node is now
deprecated, it is recommended to add it to the Root Port node, so
creating the Root Port node and add the reset-gpios property in Root
Port.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi | 5 +++++
arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 11 +++++++++++
2 files changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi
index 3e238d8118fa..338de4d144b2 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi
@@ -282,11 +282,16 @@ codec: wm8962@1a {
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
+ /* This property is deprecated, use reset-gpios from the Root Port node. */
reset-gpio = <&gpio2 0 GPIO_ACTIVE_LOW>;
vpcie-supply = <®_pcie_gpio>;
status = "okay";
};
+&pcie_port0 {
+ reset-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+};
+
&lcdif1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd>;
diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi
index 1426f357d474..d42363cb5105 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi
@@ -1470,6 +1470,17 @@ pcie: pcie@8ffc000 {
power-domains = <&pd_disp>, <&pd_pci>;
power-domain-names = "pcie", "pcie_phy";
status = "disabled";
+
+ pcie_port0: pcie@0 {
+ compatible = "pciclass,0604";
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
};
};
};
--
2.37.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH V7 08/13] arm: dts: imx7d: Add Root Port node and PERST property
2026-03-10 1:54 [PATCH V7 00/13] pci-imx6: Add support for parsing the reset property in new Root Port binding Sherry Sun
` (6 preceding siblings ...)
2026-03-10 1:54 ` [PATCH V7 07/13] arm: dts: imx6sx: " Sherry Sun
@ 2026-03-10 1:54 ` Sherry Sun
2026-03-10 1:54 ` [PATCH V7 09/13] arm64: dts: imx8mm: " Sherry Sun
` (5 subsequent siblings)
13 siblings, 0 replies; 22+ messages in thread
From: Sherry Sun @ 2026-03-10 1:54 UTC (permalink / raw)
To: hongxing.zhu, l.stach, Frank.Li, bhelgaas, lpieralisi,
kwilczynski, mani, robh, krzk+dt, conor+dt, s.hauer, festevam
Cc: imx, kernel, linux-pci, linux-arm-kernel, devicetree,
linux-kernel
Since describing the PCIe PERST# property under Host Bridge node is now
deprecated, it is recommended to add it to the Root Port node, so
creating the Root Port node and add the reset-gpios property in Root
Port.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts | 5 +++++
arch/arm/boot/dts/nxp/imx/imx7d.dtsi | 11 +++++++++++
2 files changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts b/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts
index a370e868cafe..0046b276b8b9 100644
--- a/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts
@@ -456,10 +456,15 @@ display_out: endpoint {
};
&pcie {
+ /* This property is deprecated, use reset-gpios from the Root Port node. */
reset-gpio = <&extended_io 1 GPIO_ACTIVE_LOW>;
status = "okay";
};
+&pcie_port0 {
+ reset-gpios = <&extended_io 1 GPIO_ACTIVE_LOW>;
+};
+
®_1p0d {
vin-supply = <&sw2_reg>;
};
diff --git a/arch/arm/boot/dts/nxp/imx/imx7d.dtsi b/arch/arm/boot/dts/nxp/imx/imx7d.dtsi
index d961c61a93af..3c5c1f2c1460 100644
--- a/arch/arm/boot/dts/nxp/imx/imx7d.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx7d.dtsi
@@ -155,6 +155,17 @@ pcie: pcie@33800000 {
reset-names = "pciephy", "apps", "turnoff";
fsl,imx7d-pcie-phy = <&pcie_phy>;
status = "disabled";
+
+ pcie_port0: pcie@0 {
+ compatible = "pciclass,0604";
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
};
};
};
--
2.37.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH V7 09/13] arm64: dts: imx8mm: Add Root Port node and PERST property
2026-03-10 1:54 [PATCH V7 00/13] pci-imx6: Add support for parsing the reset property in new Root Port binding Sherry Sun
` (7 preceding siblings ...)
2026-03-10 1:54 ` [PATCH V7 08/13] arm: dts: imx7d: " Sherry Sun
@ 2026-03-10 1:54 ` Sherry Sun
2026-03-10 1:54 ` [PATCH V7 10/13] arm64: dts: imx8mp: " Sherry Sun
` (4 subsequent siblings)
13 siblings, 0 replies; 22+ messages in thread
From: Sherry Sun @ 2026-03-10 1:54 UTC (permalink / raw)
To: hongxing.zhu, l.stach, Frank.Li, bhelgaas, lpieralisi,
kwilczynski, mani, robh, krzk+dt, conor+dt, s.hauer, festevam
Cc: imx, kernel, linux-pci, linux-arm-kernel, devicetree,
linux-kernel
Since describing the PCIe PERST# property under Host Bridge node is now
deprecated, it is recommended to add it to the Root Port node, so
creating the Root Port node and add the reset-gpios property in Root
Port.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 5 +++++
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 11 +++++++++++
2 files changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
index 8be44eaf4e1e..e03aba825c18 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
@@ -533,6 +533,7 @@ &pcie_phy {
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie0>;
+ /* This property is deprecated, use reset-gpios from the Root Port node. */
reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,
<&clk IMX8MM_CLK_PCIE1_AUX>;
@@ -559,6 +560,10 @@ &pcie0_ep {
status = "disabled";
};
+&pcie0_port0 {
+ reset-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
+};
+
&sai2 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index f2e1854f38a0..fa96432697ed 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1369,6 +1369,17 @@ pcie0: pcie@33800000 {
phys = <&pcie_phy>;
phy-names = "pcie-phy";
status = "disabled";
+
+ pcie0_port0: pcie@0 {
+ compatible = "pciclass,0604";
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
};
pcie0_ep: pcie-ep@33800000 {
--
2.37.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH V7 10/13] arm64: dts: imx8mp: Add Root Port node and PERST property
2026-03-10 1:54 [PATCH V7 00/13] pci-imx6: Add support for parsing the reset property in new Root Port binding Sherry Sun
` (8 preceding siblings ...)
2026-03-10 1:54 ` [PATCH V7 09/13] arm64: dts: imx8mm: " Sherry Sun
@ 2026-03-10 1:54 ` Sherry Sun
2026-03-10 1:54 ` [PATCH V7 11/13] arm64: dts: imx8mq: " Sherry Sun
` (3 subsequent siblings)
13 siblings, 0 replies; 22+ messages in thread
From: Sherry Sun @ 2026-03-10 1:54 UTC (permalink / raw)
To: hongxing.zhu, l.stach, Frank.Li, bhelgaas, lpieralisi,
kwilczynski, mani, robh, krzk+dt, conor+dt, s.hauer, festevam
Cc: imx, kernel, linux-pci, linux-arm-kernel, devicetree,
linux-kernel
Since describing the PCIe PERST# property under Host Bridge node is now
deprecated, it is recommended to add it to the Root Port node, so
creating the Root Port node and add the reset-gpios property in Root
Port.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 5 +++++
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 11 +++++++++++
2 files changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index aedc09937716..9bdc8d000d2d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -769,6 +769,7 @@ &pcie_phy {
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie0>;
+ /* This property is deprecated, use reset-gpios from the Root Port node. */
reset-gpio = <&gpio2 7 GPIO_ACTIVE_LOW>;
vpcie-supply = <®_pcie0>;
vpcie3v3aux-supply = <®_pcie0>;
@@ -782,6 +783,10 @@ &pcie0_ep {
status = "disabled";
};
+&pcie0_port0 {
+ reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
+};
+
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 9b2b3a9bf9e8..f66667735a02 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -2266,6 +2266,17 @@ pcie0: pcie: pcie@33800000 {
phys = <&pcie_phy>;
phy-names = "pcie-phy";
status = "disabled";
+
+ pcie0_port0: pcie@0 {
+ compatible = "pciclass,0604";
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
};
pcie0_ep: pcie_ep: pcie-ep@33800000 {
--
2.37.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH V7 11/13] arm64: dts: imx8mq: Add Root Port node and PERST property
2026-03-10 1:54 [PATCH V7 00/13] pci-imx6: Add support for parsing the reset property in new Root Port binding Sherry Sun
` (9 preceding siblings ...)
2026-03-10 1:54 ` [PATCH V7 10/13] arm64: dts: imx8mp: " Sherry Sun
@ 2026-03-10 1:54 ` Sherry Sun
2026-03-10 1:54 ` [PATCH V7 12/13] arm64: dts: imx8dxl/qm/qxp: " Sherry Sun
` (2 subsequent siblings)
13 siblings, 0 replies; 22+ messages in thread
From: Sherry Sun @ 2026-03-10 1:54 UTC (permalink / raw)
To: hongxing.zhu, l.stach, Frank.Li, bhelgaas, lpieralisi,
kwilczynski, mani, robh, krzk+dt, conor+dt, s.hauer, festevam
Cc: imx, kernel, linux-pci, linux-arm-kernel, devicetree,
linux-kernel
Since describing the PCIe PERST# property under Host Bridge node is now
deprecated, it is recommended to add it to the Root Port node, so
creating the Root Port node and add the reset-gpios property in Root
Port.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 10 +++++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 22 ++++++++++++++++++++
2 files changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index d48f901487d4..e7d87ea81b69 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -369,6 +369,7 @@ mipi_dsi_out: endpoint {
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie0>;
+ /* This property is deprecated, use reset-gpios from the Root Port node. */
reset-gpio = <&gpio5 28 GPIO_ACTIVE_LOW>;
clocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>,
<&pcie0_refclk>,
@@ -389,9 +390,14 @@ &pcie0_ep {
status = "disabled";
};
+&pcie0_port0 {
+ reset-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
+};
+
&pcie1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie1>;
+ /* This property is deprecated, use reset-gpios from the Root Port node. */
reset-gpio = <&gpio5 12 GPIO_ACTIVE_LOW>;
clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
<&pcie0_refclk>,
@@ -414,6 +420,10 @@ &pcie1_ep {
status = "disabled";
};
+&pcie1_port0 {
+ reset-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
+};
+
&pgc_gpu {
power-supply = <&sw1a_reg>;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 6a25e219832c..e60872aeeb49 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1768,6 +1768,17 @@ pcie0: pcie@33800000 {
assigned-clock-rates = <250000000>, <100000000>,
<10000000>;
status = "disabled";
+
+ pcie0_port0: pcie@0 {
+ compatible = "pciclass,0604";
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
};
pcie0_ep: pcie-ep@33800000 {
@@ -1846,6 +1857,17 @@ pcie1: pcie@33c00000 {
assigned-clock-rates = <250000000>, <100000000>,
<10000000>;
status = "disabled";
+
+ pcie1_port0: pcie@0 {
+ compatible = "pciclass,0604";
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
};
pcie1_ep: pcie-ep@33c00000 {
--
2.37.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH V7 12/13] arm64: dts: imx8dxl/qm/qxp: Add Root Port node and PERST property
2026-03-10 1:54 [PATCH V7 00/13] pci-imx6: Add support for parsing the reset property in new Root Port binding Sherry Sun
` (10 preceding siblings ...)
2026-03-10 1:54 ` [PATCH V7 11/13] arm64: dts: imx8mq: " Sherry Sun
@ 2026-03-10 1:54 ` Sherry Sun
2026-03-10 1:54 ` [PATCH V7 13/13] arm64: dts: imx95: " Sherry Sun
2026-03-10 19:12 ` [PATCH V7 00/13] pci-imx6: Add support for parsing the reset property in new Root Port binding Bjorn Helgaas
13 siblings, 0 replies; 22+ messages in thread
From: Sherry Sun @ 2026-03-10 1:54 UTC (permalink / raw)
To: hongxing.zhu, l.stach, Frank.Li, bhelgaas, lpieralisi,
kwilczynski, mani, robh, krzk+dt, conor+dt, s.hauer, festevam
Cc: imx, kernel, linux-pci, linux-arm-kernel, devicetree,
linux-kernel
Since describing the PCIe PERST# property under Host Bridge node is now
deprecated, it is recommended to add it to the Root Port node, so
creating the Root Port node and add the reset-gpios property in Root
Port.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
.../boot/dts/freescale/imx8-ss-hsio.dtsi | 11 ++++++++++
arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 5 +++++
arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 10 +++++++++
.../boot/dts/freescale/imx8qm-ss-hsio.dtsi | 22 +++++++++++++++++++
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 5 +++++
5 files changed, 53 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi
index 469de8b536b5..009990b2e559 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi
@@ -78,6 +78,17 @@ pcieb: pcie@5f010000 {
power-domains = <&pd IMX_SC_R_PCIE_B>;
fsl,max-link-speed = <3>;
status = "disabled";
+
+ pcieb_port0: pcie@0 {
+ compatible = "pciclass,0604";
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
};
pcieb_ep: pcie-ep@5f010000 {
diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
index 5c68d33e19f2..8f2c2bd00cde 100644
--- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
@@ -651,6 +651,7 @@ &pcie0 {
phy-names = "pcie-phy";
pinctrl-0 = <&pinctrl_pcieb>;
pinctrl-names = "default";
+ /* This property is deprecated, use reset-gpios from the Root Port node. */
reset-gpio = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>;
vpcie-supply = <®_pcieb>;
vpcie3v3aux-supply = <®_pcieb>;
@@ -667,6 +668,10 @@ &pcie0_ep {
status = "disabled";
};
+&pcieb_port0 {
+ reset-gpios = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>;
+};
+
&sai0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai0>;
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
index dadc136aec6e..02f7589bd860 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
@@ -802,6 +802,7 @@ &pciea {
phy-names = "pcie-phy";
pinctrl-0 = <&pinctrl_pciea>;
pinctrl-names = "default";
+ /* This property is deprecated, use reset-gpios from the Root Port node. */
reset-gpio = <&lsio_gpio4 29 GPIO_ACTIVE_LOW>;
vpcie-supply = <®_pciea>;
vpcie3v3aux-supply = <®_pciea>;
@@ -809,15 +810,24 @@ &pciea {
status = "okay";
};
+&pciea_port0 {
+ reset-gpios = <&lsio_gpio4 29 GPIO_ACTIVE_LOW>;
+};
+
&pcieb {
phys = <&hsio_phy 1 PHY_TYPE_PCIE 1>;
phy-names = "pcie-phy";
pinctrl-0 = <&pinctrl_pcieb>;
pinctrl-names = "default";
+ /* This property is deprecated, use reset-gpios from the Root Port node. */
reset-gpio = <&lsio_gpio5 0 GPIO_ACTIVE_LOW>;
status = "disabled";
};
+&pcieb_port0 {
+ reset-gpios = <&lsio_gpio5 0 GPIO_ACTIVE_LOW>;
+};
+
&qm_pwm_lvds0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm_lvds0>;
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi
index bd6e0aa27efe..48c29c2cfe8b 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi
@@ -40,6 +40,17 @@ pcie0: pciea: pcie@5f000000 {
power-domains = <&pd IMX_SC_R_PCIE_A>;
fsl,max-link-speed = <3>;
status = "disabled";
+
+ pciea_port0: pcie@0 {
+ compatible = "pciclass,0604";
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
};
pcie0_ep: pciea_ep: pcie-ep@5f000000 {
@@ -90,6 +101,17 @@ pcie1: pcieb: pcie@5f010000 {
power-domains = <&pd IMX_SC_R_PCIE_B>;
fsl,max-link-speed = <3>;
status = "disabled";
+
+ pcieb_port0: pcie@0 {
+ compatible = "pciclass,0604";
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
};
sata: sata@5f020000 {
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
index 40a0bc9f4e84..cd127d0a0a75 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
@@ -722,6 +722,7 @@ &pcie0 {
phy-names = "pcie-phy";
pinctrl-0 = <&pinctrl_pcieb>;
pinctrl-names = "default";
+ /* This property is deprecated, use reset-gpios from the Root Port node. */
reset-gpios = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>;
vpcie-supply = <®_pcieb>;
vpcie3v3aux-supply = <®_pcieb>;
@@ -738,6 +739,10 @@ &pcie0_ep {
status = "disabled";
};
+&pcieb_port0 {
+ reset-gpios = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>;
+};
+
&scu_key {
status = "okay";
};
--
2.37.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH V7 13/13] arm64: dts: imx95: Add Root Port node and PERST property
2026-03-10 1:54 [PATCH V7 00/13] pci-imx6: Add support for parsing the reset property in new Root Port binding Sherry Sun
` (11 preceding siblings ...)
2026-03-10 1:54 ` [PATCH V7 12/13] arm64: dts: imx8dxl/qm/qxp: " Sherry Sun
@ 2026-03-10 1:54 ` Sherry Sun
2026-03-10 19:12 ` [PATCH V7 00/13] pci-imx6: Add support for parsing the reset property in new Root Port binding Bjorn Helgaas
13 siblings, 0 replies; 22+ messages in thread
From: Sherry Sun @ 2026-03-10 1:54 UTC (permalink / raw)
To: hongxing.zhu, l.stach, Frank.Li, bhelgaas, lpieralisi,
kwilczynski, mani, robh, krzk+dt, conor+dt, s.hauer, festevam
Cc: imx, kernel, linux-pci, linux-arm-kernel, devicetree,
linux-kernel
Since describing the PCIe PERST# property under Host Bridge node is now
deprecated, it is recommended to add it to the Root Port node, so
creating the Root Port node and add the reset-gpios property in Root
Port.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
.../boot/dts/freescale/imx95-15x15-evk.dts | 5 +++++
.../boot/dts/freescale/imx95-19x19-evk.dts | 10 +++++++++
arch/arm64/boot/dts/freescale/imx95.dtsi | 22 +++++++++++++++++++
3 files changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
index d4184fb8b28c..42bc09e48b80 100644
--- a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
@@ -554,6 +554,7 @@ &netcmix_blk_ctrl {
&pcie0 {
pinctrl-0 = <&pinctrl_pcie0>;
pinctrl-names = "default";
+ /* This property is deprecated, use reset-gpios from the Root Port node. */
reset-gpio = <&gpio5 13 GPIO_ACTIVE_LOW>;
vpcie-supply = <®_m2_pwr>;
vpcie3v3aux-supply = <®_m2_pwr>;
@@ -568,6 +569,10 @@ &pcie0_ep {
status = "disabled";
};
+&pcie0_port0 {
+ reset-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+};
+
&sai1 {
assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>,
<&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>,
diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
index 041fd838fabb..6f193cf04119 100644
--- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
@@ -540,6 +540,7 @@ &netc_timer {
&pcie0 {
pinctrl-0 = <&pinctrl_pcie0>;
pinctrl-names = "default";
+ /* This property is deprecated, use reset-gpios from the Root Port node. */
reset-gpio = <&i2c7_pcal6524 5 GPIO_ACTIVE_LOW>;
vpcie-supply = <®_pcie0>;
vpcie3v3aux-supply = <®_pcie0>;
@@ -554,9 +555,14 @@ &pcie0_ep {
status = "disabled";
};
+&pcie0_port0 {
+ reset-gpios = <&i2c7_pcal6524 5 GPIO_ACTIVE_LOW>;
+};
+
&pcie1 {
pinctrl-0 = <&pinctrl_pcie1>;
pinctrl-names = "default";
+ /* This property is deprecated, use reset-gpios from the Root Port node. */
reset-gpio = <&i2c7_pcal6524 16 GPIO_ACTIVE_LOW>;
vpcie-supply = <®_slot_pwr>;
vpcie3v3aux-supply = <®_slot_pwr>;
@@ -570,6 +576,10 @@ &pcie1_ep {
status = "disabled";
};
+&pcie1_port0 {
+ reset-gpios = <&i2c7_pcal6524 16 GPIO_ACTIVE_LOW>;
+};
+
&sai1 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 5f61866e9df9..752236afce11 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -1890,6 +1890,17 @@ pcie0: pcie@4c300000 {
iommu-map-mask = <0x1ff>;
fsl,max-link-speed = <3>;
status = "disabled";
+
+ pcie0_port0: pcie@0 {
+ compatible = "pciclass,0604";
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
};
pcie0_ep: pcie-ep@4c300000 {
@@ -1967,6 +1978,17 @@ pcie1: pcie@4c380000 {
iommu-map-mask = <0x1ff>;
fsl,max-link-speed = <3>;
status = "disabled";
+
+ pcie1_port0: pcie@0 {
+ compatible = "pciclass,0604";
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
};
pcie1_ep: pcie-ep@4c380000 {
--
2.37.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH V7 00/13] pci-imx6: Add support for parsing the reset property in new Root Port binding
2026-03-10 1:54 [PATCH V7 00/13] pci-imx6: Add support for parsing the reset property in new Root Port binding Sherry Sun
` (12 preceding siblings ...)
2026-03-10 1:54 ` [PATCH V7 13/13] arm64: dts: imx95: " Sherry Sun
@ 2026-03-10 19:12 ` Bjorn Helgaas
2026-03-11 6:06 ` Sherry Sun
13 siblings, 1 reply; 22+ messages in thread
From: Bjorn Helgaas @ 2026-03-10 19:12 UTC (permalink / raw)
To: Sherry Sun
Cc: hongxing.zhu, l.stach, Frank.Li, bhelgaas, lpieralisi,
kwilczynski, mani, robh, krzk+dt, conor+dt, s.hauer, festevam,
imx, kernel, linux-pci, linux-arm-kernel, devicetree,
linux-kernel
On Tue, Mar 10, 2026 at 09:54:13AM +0800, Sherry Sun wrote:
> This patch set adds support for parsing the reset property in new Root Port
> binding in pci-imx6 driver, similar to the implementation in the qcom pcie
> driver[1].
What is this series based on? It doesn't apply to v7.0-rc1
(preferred) or pci/next.
^ permalink raw reply [flat|nested] 22+ messages in thread* RE: [PATCH V7 00/13] pci-imx6: Add support for parsing the reset property in new Root Port binding
2026-03-10 19:12 ` [PATCH V7 00/13] pci-imx6: Add support for parsing the reset property in new Root Port binding Bjorn Helgaas
@ 2026-03-11 6:06 ` Sherry Sun
0 siblings, 0 replies; 22+ messages in thread
From: Sherry Sun @ 2026-03-11 6:06 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: Hongxing Zhu, l.stach@pengutronix.de, Frank Li,
bhelgaas@google.com, lpieralisi@kernel.org,
kwilczynski@kernel.org, mani@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, s.hauer@pengutronix.de,
festevam@gmail.com, imx@lists.linux.dev, kernel@pengutronix.de,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
> On Tue, Mar 10, 2026 at 09:54:13AM +0800, Sherry Sun wrote:
> > This patch set adds support for parsing the reset property in new Root
> > Port binding in pci-imx6 driver, similar to the implementation in the
> > qcom pcie driver[1].
>
> What is this series based on? It doesn't apply to v7.0-rc1
> (preferred) or pci/next.
Hi Bjorn,
It's actually based on v7.0-rc1, but I forgot to mention that the series depends
on the following my two patches for the pci-imx6 driver. Really sorry for the
inconvenience and, I'll add this information in the cover letter.
[PATCH V2] PCI: imx6: Change imx_pcie_deassert_core_reset() to return void https://lore.kernel.org/all/20260306021247.991976-1-sherry.sun@nxp.com/
[PATCH] PCI: imx6: Separate PERST# assertion from core reset functions https://lore.kernel.org/all/20260306030456.1032815-1-sherry.sun@nxp.com/
Best Regards
Sherry
^ permalink raw reply [flat|nested] 22+ messages in thread