Re: [PATCH 2/5] dt-bindings: interrupt-controller: qcom,pdc: Document reg and QMP

[Krzysztof Kozlowski <krzk@kernel.org>]

On Thu, Mar 12, 2026 at 09:26:36PM +0530, Maulik Shah wrote:
> Document PDC reg to configure pass through or secondary controller mode
> for GPIO IRQs.
> Document QMP handle for action concerning global resources.

Don't explain what you did. We can read the diff. Explain WHY you are
doing this.

> 
> Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
> ---
>  Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
> index 5ad68b2c6fc630fb4044c7224e6791d3bf4c2937..00eb9b28170c29c811c17b1f02f1f4f14779752f 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
> @@ -62,6 +62,7 @@ properties:
>      items:
>        - description: PDC base register region
>        - description: Edge or Level config register for SPI interrupts
> +      - description: PDC config for pass through or secondary IRQ mode for GPIOs

I do not understand why all devices have suddenly grown one more MMIO
region, including devices for few years in the market. Nothing in commit
msg helped me to understand that.

Best regards,
Krzysztof