From: aspeedyh <yh_chung@aspeedtech.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
Ryan Chen <ryan_chen@aspeedtech.com>,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-aspeed@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>,
<openbmc@lists.ozlabs.org>, <maciej.lawniczak@intel.com>,
aspeedyh <yh_chung@aspeedtech.com>
Subject: [PATCH 7/7] arm: dts: aspeed: Add eSPI node for AST2600
Date: Fri, 13 Mar 2026 18:07:42 +0800 [thread overview]
Message-ID: <20260313-upstream_espi-v1-7-9504428e1f43@aspeedtech.com> (raw)
In-Reply-To: <20260313-upstream_espi-v1-0-9504428e1f43@aspeedtech.com>
Add the AST2600 eSPI controller node with the register region,
interrupt, clock, reset and pinctrl properties.
Signed-off-by: aspeedyh <yh_chung@aspeedtech.com>
---
arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
index 189bc3bbb47c..84aec45f39e7 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
@@ -408,6 +408,17 @@ adc1: adc@1e6e9100 {
status = "disabled";
};
+ espi: espi@1e6ee000 {
+ compatible = "aspeed,ast2600-espi";
+ reg = <0x1e6ee000 0x1000>;
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&syscon ASPEED_CLK_GATE_ESPICLK>;
+ resets = <&syscon 57>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_espi_default>;
+ status = "disabled";
+ };
+
sbc: secure-boot-controller@1e6f2000 {
compatible = "aspeed,ast2600-sbc";
reg = <0x1e6f2000 0x1000>;
--
2.34.1
next prev parent reply other threads:[~2026-03-13 10:08 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-13 10:07 [PATCH 0/7] soc: aspeed: Add AST2600 eSPI controller support aspeedyh
2026-03-13 10:07 ` [PATCH 1/7] dt-bindings: soc: aspeed: Add AST2600 eSPI controller aspeedyh
2026-03-16 7:07 ` Krzysztof Kozlowski
2026-03-16 8:17 ` YH Chung
2026-03-16 11:04 ` Conor Dooley
2026-03-17 8:43 ` YH Chung
2026-03-13 10:07 ` [PATCH 2/7] soc: aspeed: Introduce core eSPI controller support aspeedyh
2026-03-16 9:57 ` Philipp Zabel
2026-03-17 8:40 ` YH Chung
2026-03-13 10:07 ` [PATCH 3/7] soc: aspeed: Add AST2600 peripheral channel port I/O support aspeedyh
2026-03-13 10:07 ` [PATCH 4/7] soc: aspeed: Add eSPI TAFS backend support aspeedyh
2026-03-13 10:07 ` [PATCH 5/7] soc: aspeed: Add eSPI flash channel support aspeedyh
2026-03-19 23:53 ` kernel test robot
2026-03-20 1:17 ` kernel test robot
2026-03-20 4:19 ` kernel test robot
2026-03-13 10:07 ` [PATCH 6/7] soc: aspeed: Add sysfs controls for flash backend selection aspeedyh
2026-03-13 10:07 ` aspeedyh [this message]
2026-03-13 16:24 ` [PATCH 0/7] soc: aspeed: Add AST2600 eSPI controller support Conor Dooley
2026-03-13 16:32 ` Mark Brown
2026-03-13 16:48 ` Mark Brown
2026-03-16 3:07 ` YH Chung
2026-03-13 21:36 ` Arnd Bergmann
2026-03-14 1:02 ` Mark Brown
2026-03-16 6:06 ` Ivan Mikhaylov
2026-03-16 6:34 ` Andrew Jeffery
2026-03-17 8:14 ` YH Chung
2026-03-17 9:50 ` Arnd Bergmann
2026-03-25 8:41 ` YH Chung
2026-03-25 10:30 ` Arnd Bergmann
2026-03-27 4:14 ` YH Chung
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