Re: [PATCH 2/6] ASoC: es8316: Get sysclk rate from MCLK clock when not explicitly set

[Hongyang Zhao <hongyang.zhao@thundersoft.com>]

Thanks for the review!

> On Thu, Mar 05, 2026 at 01:47:43PM +0800, Hongyang Zhao wrote:
> 
> > @@ -477,9 +477,20 @@ static int es8316_pcm_hw_params(struct snd_pcm_substream *substream,
> >  	u8 bclk_divider;
> >  	u16 lrck_divider;
> >  	int i;
> > -	unsigned int clk = es8316->sysclk / 2;
> > +	unsigned int clk;
> >  	bool clk_valid = false;
> >  
> > +	if (es8316->sysclk == 0 && es8316->mclk) {
> > +		/* If the sysclk has not been set, try to get it from the MCLK */
> > +		es8316->sysclk = clk_get_rate(es8316->mclk);
> > +		if (es8316->sysclk == 0) {
> > +			dev_err(component->dev, "unable to get mclk rate\n");
> > +			return -EINVAL;
> > +		}
> 
> It would be better to do this by bootstrapping es8316->sysclk when we
> get the clock, we do a clk_set_rate() when we set the sysclk so the two
> should be in sync for robust operation.

I'll move the clk_get_rate() call to es8316_probe(), right after
clk_prepare_enable() succeeds, and drop the fallback logic from hw_params().
Will send a v2.

@@ -774,6 +774,9 @@ static int es8316_probe(struct snd_soc_component *component)
                return ret;
        }

+       if (es8316->mclk)
+               es8316->sysclk = clk_get_rate(es8316->mclk);
+
        /* Reset codec and enable current state machine */
        snd_soc_component_write(component, ES8316_RESET, 0x3f);
        usleep_range(5000, 5500);

Thanks,
Hongyang