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From: Conor Dooley <conor@kernel.org>
To: Jia Wang <wangjia@ultrarisc.com>
Cc: "Paul Walmsley" <pjw@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alexandre Ghiti" <alex@ghiti.fr>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Xincheng Zhang" <zhangxincheng@ultrarisc.com>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 1/4] riscv: add UltraRISC SoC family Kconfig support
Date: Mon, 16 Mar 2026 14:39:16 +0000	[thread overview]
Message-ID: <20260316-powdery-unbundle-b1166d13f53b@spud> (raw)
In-Reply-To: <20260316-ultrarisc-pcie-v1-1-ef2946ede698@ultrarisc.com>

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On Mon, Mar 16, 2026 at 03:06:57PM +0800, Jia Wang wrote:
> The first SoC in the UltraRISC series is UR-DP1000, containing octa
> UltraRISC C100 cores.
> 
> Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
> ---
>  arch/riscv/Kconfig.socs | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index d621b85dd63b..f49d3ccaacde 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -84,6 +84,16 @@ config ARCH_THEAD
>  	help
>  	  This enables support for the RISC-V based T-HEAD SoCs.
>  
> +config ARCH_ULTRARISC
> +	bool "UltraRISC RISC-V SoCs"
> +	depends on MMU && !XIP_KERNEL

Why do you depend on "MMU && !XIP_KERNEL"?

> +	help
> +	 This enables support for UltraRISC SoC platform hardware,
> +	 including boards based on the UR-DP1000.
> +	 UR-DP1000 is an 8-core 64-bit RISC-V SoC that supports
> +	 the RV64GCBHX ISA. It supports Hardware Virtualization
> +	 and RISC-V RV64 ISA H(v1.0) Extension.
> +
>  config ARCH_VIRT
>  	bool "QEMU Virt Machine"
>  	select POWER_RESET
> 
> -- 
> 2.34.1
> 

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  reply	other threads:[~2026-03-16 14:39 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-16  7:06 [PATCH 0/4] riscv: Add PCIe support for UltraRISC DP1000 SoC Jia Wang via B4 Relay
2026-03-16  7:06 ` [PATCH 1/4] riscv: add UltraRISC SoC family Kconfig support Jia Wang via B4 Relay
2026-03-16 14:39   ` Conor Dooley [this message]
2026-03-17  6:46     ` Jia Wang
2026-03-17 13:02       ` Conor Dooley
2026-03-19  9:28         ` Jia Wang
2026-03-16  7:06 ` [PATCH 2/4] MAINTAINERS: Add entry for the UltraRISC DP1000 PCIe controller driver and its DT binding Jia Wang via B4 Relay
2026-03-16  7:06 ` [PATCH 3/4] dt-bindings: PCI: Add UltraRISC DP1000 PCIe controller Jia Wang via B4 Relay
2026-03-16  8:21   ` Rob Herring (Arm)
2026-03-19 10:09     ` Jia Wang
2026-03-16 10:05   ` Krzysztof Kozlowski
2026-03-20  6:15     ` Jia Wang
2026-03-17  4:56   ` Yao Zi
2026-03-20  6:18     ` Jia Wang
2026-03-16  7:07 ` [PATCH 4/4] PCI: dwc: Add UltraRISC DP1000 PCIe rc driver Jia Wang via B4 Relay
2026-03-16 20:49   ` Bjorn Helgaas
2026-03-20  9:33     ` Jia Wang
2026-03-17  5:32   ` Yao Zi
2026-03-20  9:37     ` Jia Wang

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