From: Conor Dooley <conor@kernel.org>
To: linux-gpio@vger.kernel.org
Cc: conor@kernel.org, Conor Dooley <conor.dooley@microchip.com>,
Thomas Gleixner <tglx@linutronix.de>,
Herve Codina <herve.codina@bootlin.com>,
Daire McNamara <daire.mcnamara@microchip.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Linus Walleij <linusw@kernel.org>,
Bartosz Golaszewski <brgl@kernel.org>,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v13 1/5] dt-bindings: gpio: fix microchip,mpfs-gpio interrupt documentation
Date: Wed, 18 Mar 2026 11:04:32 +0000 [thread overview]
Message-ID: <20260318-fondly-tradition-90b8241f0cc8@spud> (raw)
In-Reply-To: <20260318-gift-nearest-fd3ef3e4819b@spud>
From: Conor Dooley <conor.dooley@microchip.com>
The microchip,mpfs-gpio binding suffered greatly due to being written
with a narrow minded view of the controller, and the interrupt bits
ended up incorrect. It was mistakenly assumed that the interrupt
configuration was set by platform firmware, based on the FPGA
configuration, and that the GPIO DT nodes were the only way to really
communicate interrupt configuration to software.
Instead, the mux should be a device in its own right, and the GPIO
controllers should be connected to it, rather than to the PLIC.
Now that a binding exists for that mux, try to fix the misconceptions
in the GPIO controller binding.
Firstly, it's not possible for this controller to have fewer than 14
GPIOs, and thus 14 interrupts also. There are three controllers, with
14, 24 & 32 GPIOs each. The fabric core, CoreGPIO, can of course have
a customisable number of GPIOs.
The example is wacky too - it follows from the incorrect understanding
that the GPIO controllers are connected to the PLIC directly. They are
not however, with a mux sitting in between. Update the example to use
the mux as a parent, and the interrupt numbers at the mux for GPIO2 as
the example - rather than the strange looking, repeated <53>.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
.../bindings/gpio/microchip,mpfs-gpio.yaml | 24 ++++++++++++-------
1 file changed, 15 insertions(+), 9 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml b/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml
index 184432d24ea18..9b8c58f391f40 100644
--- a/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml
+++ b/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml
@@ -62,6 +62,11 @@ allOf:
contains:
const: microchip,mpfs-gpio
then:
+ properties:
+ ngpios:
+ enum: [14, 24, 32]
+ interrupts:
+ minItems: 14
required:
- interrupts
- "#interrupt-cells"
@@ -82,18 +87,19 @@ examples:
compatible = "microchip,mpfs-gpio";
reg = <0x20122000 0x1000>;
clocks = <&clkcfg 25>;
- interrupt-parent = <&plic>;
+ interrupt-parent = <&irqmux>;
gpio-controller;
#gpio-cells = <2>;
+ ngpios = <32>;
interrupt-controller;
#interrupt-cells = <1>;
- interrupts = <53>, <53>, <53>, <53>,
- <53>, <53>, <53>, <53>,
- <53>, <53>, <53>, <53>,
- <53>, <53>, <53>, <53>,
- <53>, <53>, <53>, <53>,
- <53>, <53>, <53>, <53>,
- <53>, <53>, <53>, <53>,
- <53>, <53>, <53>, <53>;
+ interrupts = <64>, <65>, <66>, <67>,
+ <68>, <69>, <70>, <71>,
+ <72>, <73>, <74>, <75>,
+ <76>, <77>, <78>, <79>,
+ <80>, <81>, <82>, <83>,
+ <84>, <85>, <86>, <87>,
+ <88>, <89>, <90>, <91>,
+ <92>, <93>, <94>, <95>;
};
...
--
2.51.0
next prev parent reply other threads:[~2026-03-18 11:04 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-18 11:04 [PATCH v13 0/5] PolarFire SoC GPIO interrupt support Conor Dooley
2026-03-18 11:04 ` Conor Dooley [this message]
2026-03-20 13:01 ` [PATCH v13 1/5] dt-bindings: gpio: fix microchip,mpfs-gpio interrupt documentation Linus Walleij
2026-03-22 22:52 ` Rob Herring (Arm)
2026-03-18 11:04 ` [PATCH v13 2/5] gpio: mpfs: Add interrupt support Conor Dooley
2026-03-18 11:04 ` [PATCH v13 3/5] dt-bindings: soc: microchip: document PolarFire SoC's gpio interrupt mux Conor Dooley
2026-03-20 13:02 ` Linus Walleij
2026-03-22 22:56 ` Rob Herring (Arm)
2026-03-18 11:04 ` [PATCH v13 4/5] soc: microchip: add mpfs gpio interrupt mux driver Conor Dooley
2026-03-18 11:04 ` [PATCH v13 5/5] riscv: dts: microchip: update mpfs gpio interrupts to better match the SoC Conor Dooley
2026-03-23 9:56 ` (subset) [PATCH v13 0/5] PolarFire SoC GPIO interrupt support Bartosz Golaszewski
2026-03-24 17:45 ` Conor Dooley
2026-03-31 13:14 ` Conor Dooley
2026-03-31 13:25 ` Bartosz Golaszewski
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