From: Conor Dooley <conor@kernel.org>
To: Yixun Lan <dlan@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Ze Huang <huang.ze@linux.dev>,
Thinh Nguyen <Thinh.Nguyen@synopsys.com>,
Emil Renner Berthing <kernel@esmil.dk>,
Junzhong Pan <junzhong.pan@spacemit.com>,
Inochi Amaoto <inochiama@gmail.com>,
spacemit@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-usb@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH v2 1/2] dt-bindings: usb: dwc3: spacemit: add support for K3 SoC
Date: Fri, 20 Mar 2026 17:30:38 +0000 [thread overview]
Message-ID: <20260320-rival-distill-c9021491769a@spud> (raw)
In-Reply-To: <20260320-02-k3-usb20-support-v2-1-308ea0e44038@kernel.org>
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On Fri, Mar 20, 2026 at 07:15:37AM +0000, Yixun Lan wrote:
> Add compatible string for DWC3 USB controller found in SpacemiT K3 SoC.
>
> The USB2.0 host controller in K3 SoC actually use DWC3 IP but only support
> USB2.0 functionality, thus in the hardware layer, it has only one USB2 PHY.
> While in K1 SoC, the USB controller has both USB2 and USB3 Combo PHY
> connected, but able to work in a reduced USB2.0 mode which requres only
> one USB2 PHY, leaves the USB3 Combo PHY to PCIe controller. So both K1
> and K3 SoC are able to work in the USB2.0 mode which requires one PHY.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable
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next prev parent reply other threads:[~2026-03-20 17:30 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-20 7:15 [PATCH v2 0/2] usb: spacemit: k3: Add USB2.0 support Yixun Lan
2026-03-20 7:15 ` [PATCH v2 1/2] dt-bindings: usb: dwc3: spacemit: add support for K3 SoC Yixun Lan
2026-03-20 17:30 ` Conor Dooley [this message]
2026-03-20 7:15 ` [PATCH v2 2/2] usb: dwc3: dwc3-generic-plat: " Yixun Lan
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