From: Thierry Reding <thierry.reding@kernel.org>
To: Thierry Reding <thierry.reding@kernel.org>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Jon Hunter <jonathanh@nvidia.com>,
devicetree@vger.kernel.org, linux-tegra@vger.kernel.org
Subject: [PATCH 2/2] arm64: tegra: Add FUSE block on Tegra264
Date: Sat, 21 Mar 2026 00:38:22 +0100 [thread overview]
Message-ID: <20260320233822.2578569-2-thierry.reding@kernel.org> (raw)
In-Reply-To: <20260320233822.2578569-1-thierry.reding@kernel.org>
From: Thierry Reding <treding@nvidia.com>
The FUSE block contains a number of registers exposing information that
is useful for certain drivers and/or userspace to read at runtime.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra264.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts/nvidia/tegra264.dtsi
index 8dbce25dfa3a..efb4d21aa4e3 100644
--- a/arch/arm64/boot/dts/nvidia/tegra264.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra264.dtsi
@@ -41,6 +41,13 @@ misc@100000 {
<0x0 0x0c140000 0x0 0x10000>;
};
+ fuse@1000000 {
+ compatible = "nvidia,tegra264-efuse";
+ reg = <0x0 0x1000000 0x0 0x10000>;
+ clocks = <&bpmp TEGRA264_CLK_FUSE>;
+ clock-names = "fuse";
+ };
+
timer@8000000 {
compatible = "nvidia,tegra234-timer";
reg = <0x0 0x08000000 0x0 0x140000>;
--
2.52.0
next prev parent reply other threads:[~2026-03-20 23:38 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-20 23:38 [PATCH 1/2] dt-bindings: fuse: Document compatible string for Tegra264 FUSE Thierry Reding
2026-03-20 23:38 ` Thierry Reding [this message]
2026-03-21 10:50 ` Krzysztof Kozlowski
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