From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A88C26A1B9; Tue, 24 Mar 2026 01:57:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774317477; cv=none; b=TtcNm02KAnDKYkLV00iaO0tZ1Aek0MMykTA9GHrayS/kjhzsFwYKjOUkk4W2XM25h1dvoJpbMFwX/A+A/hNauJ0qzWfJc9JO7Yqi8VhTrTH4zLA4ZJy7zSlRsvhUAoLTRM7T7NS7wghqkP8qvyAU+fLdX8IaL9wTwyUTIGXlW/k= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774317477; c=relaxed/simple; bh=rdg8N2WWiIOMfPyiUYNuSu7l6G+0ThKy6YJNvgGwfvk=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Ivoa/lTgYWXqjjfRWMbpQVFM4grmK+kZfxUTY/iywlTKHuQqRvZmLLzRCpMU5JN45VaRIV2Zgrwy+0VGICEmkZhpQkYizTpxLlK8STLv58iBAR2wSiuH6FMG+sj6FQJqvTJbjqjC1a+biSi/ERt6W0rxzG0yq2O6TD1xWochdWo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=VzBQQCGW; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="VzBQQCGW" X-UUID: d9caa360272411f1a02d4725871ece0b-20260324 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=wT5KayC1YhhYfVHBrtoS1Lhs8R+hRDVCsvhOb4nZ0nE=; b=VzBQQCGWBx5tmJydzYaJgOc9wOSBSL4d2JdRMTeA7ulWB3QOsl3yIere/yAwfC9yEYaXMJVnEBzTnr+xrsoV43557b3ZS/u/EDtFaNCTJVZPz/p0Lpcyira4Ea4gHvJNDdTiVM+wdt4IyujLaYO4WG1GlhC02+IDirFbwcmqgzg=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.12,REQID:40ed2563-ee97-4f54-8074-bfeacfe406fc,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:e7bac3a,CLOUDID:50f00817-aa6b-4b2e-be76-373ef1a42b04,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|888|898,TC:-5,Content: 0|15|50,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0,OSI :0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: d9caa360272411f1a02d4725871ece0b-20260324 Received: from mtkmbs14n2.mediatek.inc [(172.21.101.76)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1431233903; Tue, 24 Mar 2026 09:57:45 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Tue, 24 Mar 2026 09:57:43 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Tue, 24 Mar 2026 09:57:42 +0800 From: Cyril Chao To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Jaroslav Kysela , Takashi Iwai CC: , , , , , Cyril Chao , , Darren Ye , Louis-Alexis Eyraud , Cyril Chao Subject: [PATCH v8 01/10] ASoC: mediatek: common: modify mtk afe platform driver for mt8196 Date: Tue, 24 Mar 2026 09:56:42 +0800 Message-ID: <20260324015719.17543-2-Cyril.Chao@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20260324015719.17543-1-Cyril.Chao@mediatek.com> References: <20260324015719.17543-1-Cyril.Chao@mediatek.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-MTK: N From: Darren Ye Mofify the pcm pointer interface to support 64-bit address access. Signed-off-by: Darren Ye Reviewed-by: AngeloGioacchino Del Regno Tested-by: Louis-Alexis Eyraud Signed-off-by: Cyril Chao --- .../mediatek/common/mtk-afe-platform-driver.c | 56 +++++++++++++------ .../mediatek/common/mtk-afe-platform-driver.h | 2 + 2 files changed, 40 insertions(+), 18 deletions(-) diff --git a/sound/soc/mediatek/common/mtk-afe-platform-driver.c b/sound/soc/mediatek/common/mtk-afe-platform-driver.c index f2b39fc9ec81..477284e12396 100644 --- a/sound/soc/mediatek/common/mtk-afe-platform-driver.c +++ b/sound/soc/mediatek/common/mtk-afe-platform-driver.c @@ -87,29 +87,49 @@ snd_pcm_uframes_t mtk_afe_pcm_pointer(struct snd_soc_component *component, const struct mtk_base_memif_data *memif_data = memif->data; struct regmap *regmap = afe->regmap; struct device *dev = afe->dev; - int reg_ofs_base = memif_data->reg_ofs_base; - int reg_ofs_cur = memif_data->reg_ofs_cur; - unsigned int hw_ptr = 0, hw_base = 0; - int ret, pcm_ptr_bytes; - - ret = regmap_read(regmap, reg_ofs_cur, &hw_ptr); - if (ret || hw_ptr == 0) { - dev_err(dev, "%s hw_ptr err\n", __func__); - pcm_ptr_bytes = 0; - goto POINTER_RETURN_FRAMES; + unsigned int hw_ptr_lower32 = 0, hw_ptr_upper32 = 0; + unsigned int hw_base_lower32 = 0, hw_base_upper32 = 0; + unsigned long long hw_ptr = 0, hw_base = 0; + int ret; + unsigned long long pcm_ptr_bytes = 0; + + ret = regmap_read(regmap, memif_data->reg_ofs_cur, &hw_ptr_lower32); + if (ret) { + dev_err(dev, "%s hw_ptr_lower32 err\n", __func__); + return 0; } - ret = regmap_read(regmap, reg_ofs_base, &hw_base); - if (ret || hw_base == 0) { - dev_err(dev, "%s hw_ptr err\n", __func__); - pcm_ptr_bytes = 0; - goto POINTER_RETURN_FRAMES; + if (memif_data->reg_ofs_cur_msb) { + ret = regmap_read(regmap, memif_data->reg_ofs_cur_msb, &hw_ptr_upper32); + if (ret) { + dev_err(dev, "%s hw_ptr_upper32 err\n", __func__); + return 0; + } } - pcm_ptr_bytes = hw_ptr - hw_base; + ret = regmap_read(regmap, memif_data->reg_ofs_base, &hw_base_lower32); + if (ret) { + dev_err(dev, "%s hw_base_lower32 err\n", __func__); + return 0; + } + if (memif_data->reg_ofs_base_msb) { + ret = regmap_read(regmap, memif_data->reg_ofs_base_msb, &hw_base_upper32); + if (ret) { + dev_err(dev, "%s hw_base_upper32 err\n", __func__); + return 0; + } + } + + hw_ptr = ((unsigned long long)hw_ptr_upper32 << 32) | hw_ptr_lower32; + hw_base = ((unsigned long long)hw_base_upper32 << 32) | hw_base_lower32; + + if (!hw_ptr || !hw_base) { + dev_err(dev, "hw_ptr or hw_base = 0 err\n"); + return 0; + } -POINTER_RETURN_FRAMES: - return bytes_to_frames(substream->runtime, pcm_ptr_bytes); + pcm_ptr_bytes = MTK_ALIGN_16BYTES(hw_ptr - hw_base); + return bytes_to_frames(substream->runtime, (ssize_t)pcm_ptr_bytes); } EXPORT_SYMBOL_GPL(mtk_afe_pcm_pointer); diff --git a/sound/soc/mediatek/common/mtk-afe-platform-driver.h b/sound/soc/mediatek/common/mtk-afe-platform-driver.h index fcc923b88f12..71070b26f8f8 100644 --- a/sound/soc/mediatek/common/mtk-afe-platform-driver.h +++ b/sound/soc/mediatek/common/mtk-afe-platform-driver.h @@ -12,6 +12,8 @@ #define AFE_PCM_NAME "mtk-afe-pcm" extern const struct snd_soc_component_driver mtk_afe_pcm_platform; +#define MTK_ALIGN_16BYTES(x) ((x) & GENMASK_ULL(39, 4)) + struct mtk_base_afe; struct snd_pcm; struct snd_soc_component; -- 2.45.2