From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E91E3CE48A for ; Wed, 25 Mar 2026 11:09:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774436976; cv=none; b=JziouALx00i4PFJktWh9Vp3JYF9HVIekXNS7bYDKCJaQpTf4ivPl3bLHJ63GaTBcFM7x9iTH7zzv/Drla1m1Rv0EJpBCXk80Q5NopszrvTnWwDlIbANK4rZzcB8XfADSRymhkW8D1GzHlc0Qe9Lga4U/oGhXblIOkqBFGTao3aE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774436976; c=relaxed/simple; bh=50/McAzCfnfZeAKLApvc4GVUf6TH117s5hb7iCyl0RY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gCPClqXKKEK0YRFaTQwGnhwQAZctJpCwIFRmfR3+raVOcu0dhJ9TXD5MDpuMJu8GDPY0UbLEJOUSinpRxdQuyWq7ds71R1ouiYNB6Z5NWTemaHcj+TmBngiw9v9vw4TnL3S+RfKXpk2tESk+kt/Odp5v2Rkjh+OMauQn5FcoMH8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=ElBL7M58; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=R9peUXe9; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="ElBL7M58"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="R9peUXe9" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 62PAQTSV2884711 for ; Wed, 25 Mar 2026 11:09:33 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= lgE7Zsp3SLiKEODF/sUpup/AAiqq/KxN2EHDiN7r6NY=; b=ElBL7M58XLrUhGkH hc/3bNYY22usBRcqSpIiXXXfiQ/1JbJkaSSDb22QEvJGB1w2HZLUW8BCavwgToTW 7iA9b3n1jWAQbCJILAMozSjaMMmc7C+WYfHJp+VzHSpfTqAf2E0q1w9MeMiP/vyM BGgnfelVK1SoVvlfx97PpcLNU7niq+b/ZTJ+sCX0aKtXma1XQRZOC5+3AHWUIoA6 KGRBjvM+V7CPnExeVIqaM1551EcRcHGwi42+0l4KD6/5VcYhP3IEExMdDFcwnm9J WGDrl6/lbJ2KnS2ClRIDs3zttRvyg0mxstze7zvwGQuK4vS6Uax+8jy0iPCFo6B0 H77FOQ== Received: from mail-pf1-f199.google.com (mail-pf1-f199.google.com [209.85.210.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4d4dy4g534-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 25 Mar 2026 11:09:33 +0000 (GMT) Received: by mail-pf1-f199.google.com with SMTP id d2e1a72fcca58-82c6dd66f6dso2062032b3a.1 for ; Wed, 25 Mar 2026 04:09:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1774436972; x=1775041772; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=lgE7Zsp3SLiKEODF/sUpup/AAiqq/KxN2EHDiN7r6NY=; b=R9peUXe9t9CG6ywCG2mk3Px6B0XxrxYkIsA2yXRtJzwxraDK/cmSe2hGReWA4TIxyX yfr4ihb77Mo8woHeadGOBZv2BRpd/HuYzpLR/iDXWItCCVqcsnYp3wDwhZ3ysE2f6U0/ jje6ZPFIIY5RGUq/T+bI1Bv2pCUYgn01ong9efnlyhulxBbiJ0fZjLugqb8ggIl0/1D0 7zo+IuCjdwPNhuk9z0pAdW+hAOMN9cYjV5+HJn/iD9Q15POem6L5CLEvetSQZ8S8SzRz 2n5JeZcVx7f31BP7WLAW/5EP+HeJUoDzFlCsjC+lVlZPTQglbKM/zaloyxgeoXGNEakm N2AQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1774436972; x=1775041772; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=lgE7Zsp3SLiKEODF/sUpup/AAiqq/KxN2EHDiN7r6NY=; b=eVIjrFgChQFHP64dvcBdFPMVY9LCVGHhWXDthDh0I3cEVK3smKWCIAJoKOPUUCwzly yl85mjo2Yz7BleJzr01Ju27eBaAzfQgXqod/g1uV90oinXiyQrHHlvnaZex5UJSV9KTx 4Jgt9r6LK5Bhtpkd1RDshbpY4f0UyP6wn8MqEQXAMTnldnKtBG6OsunQG3GS8s8cScjF zj2Q1+mHA0y+TO+DxkQv5SCgUA8bPy//SFMFEPbhpEBpS1KJUVbDmGdrjb+zWh3VWdG+ l/aiikwEpAYhJIHzKJV3V+W5ESHcvFg5N/nYjVV1MNEJ0iUMPe/TUrEL28ktnFhXR4M4 ILIw== X-Forwarded-Encrypted: i=1; AJvYcCVLdQp1N0CTltHMt5oFDp85MQL3KaIftXN0USeYWEUB9YT5B2mpwi2q0VmOMBr6KJk23VkY3+usfjz4@vger.kernel.org X-Gm-Message-State: AOJu0Yx2RzypgBZ0kxv59pui3UhtlgMqsKLN+hN1J8x5kVqDeCXFTRJP 83+u1pV9JsUDz5s0S8Olgr3MS8PfYUta+kjYO/j9Qf3mI+DqwzvxsnO/d4eINK+Dn9Wy0POve+e cJJaNkVei0d5YlaJelTCx7w73AhhLpWzlq6cdvgY3SQJKCAK7rzeiTHqzZwBz9uth X-Gm-Gg: ATEYQzxNAOHKH2Zi4jRnMDIz5qFLRx0W4SFDm4wkr+CSfmpu4bymMeckvaunpYxGXGo tZFlGMoNZ3wQDxkyrlgFZLz4vldnLtbqVdCOSO8HZfL4GLoNj1Kz4c8UNqcHzyTjE1Cx1zxVlTu tFASFk8U1lMTP/UfhVob3slbIxMe3y2vObeBeSPprsMNCwPfWSl4M/C9qmeoR2WqkGqb59C/Y6Z zEuSR70CIvIjrrYfcuEQHchsSjibV8yKdStC+Hg4hPYQULFdQzWvfxu38SX4boLh/I0qfAzbTfC N6JyjqiDf2TQF3vm+i3WgCC4pT2BqQx9xTjDNsyX6mgKLCfZIfjKbDFKaEmycceKbHzSJrjICkE JgjZoRcfFmjosQCwGYtXY7+Sa09t00kngnSba/oHEhylGp5ITHVva6Wyl X-Received: by 2002:a05:6a00:10cf:b0:829:9c5d:4342 with SMTP id d2e1a72fcca58-82c6e15d271mr2811229b3a.54.1774436972248; Wed, 25 Mar 2026 04:09:32 -0700 (PDT) X-Received: by 2002:a05:6a00:10cf:b0:829:9c5d:4342 with SMTP id d2e1a72fcca58-82c6e15d271mr2811177b3a.54.1774436971553; Wed, 25 Mar 2026 04:09:31 -0700 (PDT) Received: from hu-vjitta-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82b040da7besm14615911b3a.49.2026.03.25.04.09.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Mar 2026 04:09:31 -0700 (PDT) From: Vijayanand Jitta Date: Wed, 25 Mar 2026 16:38:23 +0530 Subject: [PATCH v11 2/3] of: Factor arguments passed to of_map_id() into a struct Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260325-parse_iommu_cells-v11-2-1fefa5c0e82c@oss.qualcomm.com> References: <20260325-parse_iommu_cells-v11-0-1fefa5c0e82c@oss.qualcomm.com> In-Reply-To: <20260325-parse_iommu_cells-v11-0-1fefa5c0e82c@oss.qualcomm.com> To: Nipun Gupta , Nikhil Agarwal , Joerg Roedel , Will Deacon , Robin Murphy , Marc Zyngier , Lorenzo Pieralisi , Thomas Gleixner , Saravana Kannan , Richard Zhu , Lucas Stach , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Dmitry Baryshkov , Konrad Dybcio , Bjorn Andersson , Rob Herring , Conor Dooley , Krzysztof Kozlowski , Prakash Gupta , Vikash Garodia Cc: linux-kernel@vger.kernel.org, iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, imx@lists.linux.dev, xen-devel@lists.xenproject.org, linux-arm-msm@vger.kernel.org, Vijayanand Jitta , Charan Teja Kalla X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1774436939; l=16000; i=vijayanand.jitta@oss.qualcomm.com; s=20260301; h=from:subject:message-id; bh=gxyh8n3UqUiPA5dAPelXlk+6i5RBUb4GI89qh+AaKkQ=; b=cmC+TnDCTT7br0djfe9TJoPc8+8f1hTHJV9CIDTZRNBzWhCXkwhBe4lpX9dunABLkIBgsSpny Cd2K8mf9v2aDmz80oQoKSUpbWQg3qYP/LgX0C1TVvUKvw6nxE063Mxx X-Developer-Key: i=vijayanand.jitta@oss.qualcomm.com; a=ed25519; pk=Lpi7Cs3wHe8KZtqvyci7FTOLzsKpEHKGCaPNZw+1zRI= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI1MDA3OSBTYWx0ZWRfX3mJTglgpE57G ecpV7XNtZrVpHksQnbAS2dcUp4yTAwX6JoXq7ngdUBe/JZROia3gPcRIqygiSZJ7fU/THAjPDUc LgVbesWUzjpY48CQhxDa73wMCVFP1X8nzWivj0Q9TpKogstwWBdjqBWbnw/32HzSjojFaWhPH1/ 7HHEhJ9YfcJ6t/nIWw5Rp3uN8nvgqWZw+dDMQxfye3MUQokuIbEcBjdLxg7IkebjsXTly4gnuFe eon+p1GolbOgikqCTfEAJNVt1i9kIRtcuL5PoYPlBxVvN7h4psivsKVKSNpNdzwfLjA5voxCFyn UjGubd2n5uiMHgNJkezzcfM9QGSFUy/Y9Ue422ga5NwRyuPitdcDOdtOu8LuRbfOsv92FKPAXU2 xC2MdVojpEYQDRMlCri81FnBL4NRcWuPz6lZvZuOrXDS4fl18vZC5PxizUoF8EuUcKexlarIwQE 7wgfkb+6TlKwei+1e6w== X-Proofpoint-ORIG-GUID: FZhzi0lB2e9TN2dljphYjDbu24pxe6sv X-Proofpoint-GUID: FZhzi0lB2e9TN2dljphYjDbu24pxe6sv X-Authority-Analysis: v=2.4 cv=eeUwvrEH c=1 sm=1 tr=0 ts=69c3c26d cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=EUspDBNiAAAA:8 a=VwQbUJbxAAAA:8 a=bNhV2RZpjyF2osP7l7QA:9 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-25_03,2026-03-24_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 adultscore=0 suspectscore=0 spamscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603250079 From: Charan Teja Kalla Change of_map_id() to take a pointer to struct of_phandle_args instead of passing target device node and translated IDs separately. Update all callers accordingly. Add an explicit filter_np parameter to of_map_id() and of_map_msi_id() to separate the filter input from the output. Previously, the target parameter served dual purpose: as an input filter (if non-NULL, only match entries targeting that node) and as an output (receiving the matched node with a reference held). Now filter_np is the explicit input filter and arg->np is the pure output. Previously, of_map_id() would call of_node_put() on the matched node when a filter was provided, making reference ownership inconsistent. Remove this internal of_node_put() call so that of_map_id() now always transfers ownership of the matched node reference to the caller via arg->np. Callers are now consistently responsible for releasing this reference with of_node_put(arg->np) when done. Suggested-by: Rob Herring (Arm) Suggested-by: Dmitry Baryshkov Signed-off-by: Charan Teja Kalla Signed-off-by: Vijayanand Jitta --- drivers/cdx/cdx_msi.c | 7 ++-- drivers/iommu/of_iommu.c | 4 +- drivers/irqchip/irq-gic-its-msi-parent.c | 11 ++++-- drivers/of/base.c | 68 +++++++++++++++++--------------- drivers/of/irq.c | 10 ++++- drivers/pci/controller/dwc/pci-imx6.c | 16 ++++++-- drivers/pci/controller/pcie-apple.c | 5 ++- drivers/xen/grant-dma-ops.c | 4 +- include/linux/of.h | 14 ++++--- 9 files changed, 86 insertions(+), 53 deletions(-) diff --git a/drivers/cdx/cdx_msi.c b/drivers/cdx/cdx_msi.c index 63b3544ec997..6924e07c7528 100644 --- a/drivers/cdx/cdx_msi.c +++ b/drivers/cdx/cdx_msi.c @@ -121,22 +121,23 @@ static int cdx_msi_prepare(struct irq_domain *msi_domain, struct device *dev, int nvec, msi_alloc_info_t *info) { + struct of_phandle_args msi_spec = {}; struct cdx_device *cdx_dev = to_cdx_device(dev); struct device *parent = cdx_dev->cdx->dev; struct msi_domain_info *msi_info; - u32 dev_id; int ret; /* Retrieve device ID from requestor ID using parent device */ - ret = of_map_msi_id(parent->of_node, cdx_dev->msi_dev_id, NULL, &dev_id); + ret = of_map_msi_id(parent->of_node, cdx_dev->msi_dev_id, NULL, &msi_spec); if (ret) { dev_err(dev, "of_map_id failed for MSI: %d\n", ret); return ret; } + of_node_put(msi_spec.np); #ifdef GENERIC_MSI_DOMAIN_OPS /* Set the device Id to be passed to the GIC-ITS */ - info->scratchpad[0].ul = dev_id; + info->scratchpad[0].ul = msi_spec.args[0]; #endif msi_info = msi_get_domain_info(msi_domain->parent); diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c index a511ecf21fcd..a18bb60f6f3d 100644 --- a/drivers/iommu/of_iommu.c +++ b/drivers/iommu/of_iommu.c @@ -45,10 +45,10 @@ static int of_iommu_configure_dev_id(struct device_node *master_np, struct device *dev, const u32 *id) { - struct of_phandle_args iommu_spec = { .args_count = 1 }; + struct of_phandle_args iommu_spec = {}; int err; - err = of_map_iommu_id(master_np, *id, &iommu_spec.np, iommu_spec.args); + err = of_map_iommu_id(master_np, *id, &iommu_spec); if (err) return err; diff --git a/drivers/irqchip/irq-gic-its-msi-parent.c b/drivers/irqchip/irq-gic-its-msi-parent.c index b63343a227a9..dd5f84b6470a 100644 --- a/drivers/irqchip/irq-gic-its-msi-parent.c +++ b/drivers/irqchip/irq-gic-its-msi-parent.c @@ -152,6 +152,8 @@ static int its_v5_pci_msi_prepare(struct irq_domain *domain, struct device *dev, static int of_pmsi_get_msi_info(struct irq_domain *domain, struct device *dev, u32 *dev_id, phys_addr_t *pa) { + struct device_node *msi_ctrl __free(device_node) = NULL; + struct of_phandle_args msi_spec = {}; struct of_phandle_iterator it; int ret; @@ -178,9 +180,12 @@ static int of_pmsi_get_msi_info(struct irq_domain *domain, struct device *dev, u } } - struct device_node *msi_ctrl __free(device_node) = NULL; - - return of_map_msi_id(dev->of_node, dev->id, &msi_ctrl, dev_id); + ret = of_map_msi_id(dev->of_node, dev->id, NULL, &msi_spec); + if (!ret) { + msi_ctrl = msi_spec.np; + *dev_id = msi_spec.args[0]; + } + return ret; } static int its_pmsi_prepare(struct irq_domain *domain, struct device *dev, diff --git a/drivers/of/base.c b/drivers/of/base.c index ae04487bd614..b3d002015192 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -2102,36 +2102,37 @@ int of_find_last_cache_level(unsigned int cpu) * @id: device ID to map. * @map_name: property name of the map to use. * @map_mask_name: optional property name of the mask to use. - * @target: optional pointer to a target device node. - * @id_out: optional pointer to receive the translated ID. + * @filter_np: optional device node to filter matches by, or NULL to match any. + * If non-NULL, only map entries targeting this node will be matched. + * @arg: pointer to a &struct of_phandle_args for the result. On success, + * @arg->args[0] will contain the translated ID. If a map entry was + * matched, @arg->np will be set to the target node with a reference + * held that the caller must release with of_node_put(). * * Given a device ID, look up the appropriate implementation-defined * platform ID and/or the target device which receives transactions on that - * ID, as per the "iommu-map" and "msi-map" bindings. Either of @target or - * @id_out may be NULL if only the other is required. If @target points to - * a non-NULL device node pointer, only entries targeting that node will be - * matched; if it points to a NULL value, it will receive the device node of - * the first matching target phandle, with a reference held. + * ID, as per the "iommu-map" and "msi-map" bindings. * * Return: 0 on success or a standard error code on failure. */ int of_map_id(const struct device_node *np, u32 id, const char *map_name, const char *map_mask_name, - struct device_node **target, u32 *id_out) + const struct device_node *filter_np, struct of_phandle_args *arg) { u32 map_mask, masked_id; int map_len; const __be32 *map = NULL; - if (!np || !map_name || (!target && !id_out)) + if (!np || !map_name || !arg) return -EINVAL; map = of_get_property(np, map_name, &map_len); if (!map) { - if (target) + if (filter_np) return -ENODEV; /* Otherwise, no map implies no translation */ - *id_out = id; + arg->args[0] = id; + arg->args_count = 1; return 0; } @@ -2173,18 +2174,14 @@ int of_map_id(const struct device_node *np, u32 id, if (!phandle_node) return -ENODEV; - if (target) { - if (*target) - of_node_put(phandle_node); - else - *target = phandle_node; - - if (*target != phandle_node) - continue; + if (filter_np && filter_np != phandle_node) { + of_node_put(phandle_node); + continue; } - if (id_out) - *id_out = masked_id - id_base + out_base; + arg->np = phandle_node; + arg->args[0] = masked_id - id_base + out_base; + arg->args_count = 1; pr_debug("%pOF: %s, using mask %08x, id-base: %08x, out-base: %08x, length: %08x, id: %08x -> %08x\n", np, map_name, map_mask, id_base, out_base, @@ -2193,11 +2190,11 @@ int of_map_id(const struct device_node *np, u32 id, } pr_info("%pOF: no %s translation for id 0x%x on %pOF\n", np, map_name, - id, target && *target ? *target : NULL); + id, filter_np); /* Bypasses translation */ - if (id_out) - *id_out = id; + arg->args[0] = id; + arg->args_count = 1; return 0; } EXPORT_SYMBOL_GPL(of_map_id); @@ -2207,17 +2204,19 @@ EXPORT_SYMBOL_GPL(of_map_id); * @np: root complex device node. * @id: Requester ID of the device (e.g. PCI RID/BDF or a platform * stream/device ID) used as the lookup key in the iommu-map table. - * @target: optional pointer to a target device node. - * @id_out: optional pointer to receive the translated ID. + * @arg: pointer to a &struct of_phandle_args for the result. On success, + * @arg->args[0] contains the translated ID. If a map entry was matched, + * @arg->np holds a reference to the target node that the caller must + * release with of_node_put(). * * Convenience wrapper around of_map_id() using "iommu-map" and "iommu-map-mask". * * Return: 0 on success or a standard error code on failure. */ int of_map_iommu_id(const struct device_node *np, u32 id, - struct device_node **target, u32 *id_out) + struct of_phandle_args *arg) { - return of_map_id(np, id, "iommu-map", "iommu-map-mask", target, id_out); + return of_map_id(np, id, "iommu-map", "iommu-map-mask", NULL, arg); } EXPORT_SYMBOL_GPL(of_map_iommu_id); @@ -2226,16 +2225,21 @@ EXPORT_SYMBOL_GPL(of_map_iommu_id); * @np: root complex device node. * @id: Requester ID of the device (e.g. PCI RID/BDF or a platform * stream/device ID) used as the lookup key in the msi-map table. - * @target: optional pointer to a target device node. - * @id_out: optional pointer to receive the translated ID. + * @filter_np: optional MSI controller node to filter matches by, or NULL + * to match any. If non-NULL, only map entries targeting this node will + * be matched. + * @arg: pointer to a &struct of_phandle_args for the result. On success, + * @arg->args[0] contains the translated ID. If a map entry was matched, + * @arg->np holds a reference to the target node that the caller must + * release with of_node_put(). * * Convenience wrapper around of_map_id() using "msi-map" and "msi-map-mask". * * Return: 0 on success or a standard error code on failure. */ int of_map_msi_id(const struct device_node *np, u32 id, - struct device_node **target, u32 *id_out) + const struct device_node *filter_np, struct of_phandle_args *arg) { - return of_map_id(np, id, "msi-map", "msi-map-mask", target, id_out); + return of_map_id(np, id, "msi-map", "msi-map-mask", filter_np, arg); } EXPORT_SYMBOL_GPL(of_map_msi_id); diff --git a/drivers/of/irq.c b/drivers/of/irq.c index e37c1b3f8736..f86a56bd81fc 100644 --- a/drivers/of/irq.c +++ b/drivers/of/irq.c @@ -817,8 +817,16 @@ u32 of_msi_xlate(struct device *dev, struct device_node **msi_np, u32 id_in) * "msi-map" or an "msi-parent" property. */ for (parent_dev = dev; parent_dev; parent_dev = parent_dev->parent) { - if (!of_map_msi_id(parent_dev->of_node, id_in, msi_np, &id_out)) + struct of_phandle_args msi_spec = {}; + + if (!of_map_msi_id(parent_dev->of_node, id_in, *msi_np, &msi_spec)) { + id_out = msi_spec.args[0]; + if (!*msi_np) + *msi_np = msi_spec.np; + else + of_node_put(msi_spec.np); break; + } if (!of_check_msi_parent(parent_dev->of_node, msi_np)) break; } diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index bff8289f804a..cfd5eb8783b6 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -1137,6 +1137,8 @@ static void imx_pcie_remove_lut(struct imx_pcie *imx_pcie, u16 rid) static int imx_pcie_add_lut_by_rid(struct imx_pcie *imx_pcie, u32 rid) { + struct of_phandle_args iommu_spec = {}; + struct of_phandle_args msi_spec = {}; struct device *dev = imx_pcie->pci->dev; struct device_node *target; u32 sid_i, sid_m; @@ -1144,7 +1146,12 @@ static int imx_pcie_add_lut_by_rid(struct imx_pcie *imx_pcie, u32 rid) u32 sid = 0; target = NULL; - err_i = of_map_iommu_id(dev->of_node, rid, &target, &sid_i); + err_i = of_map_iommu_id(dev->of_node, rid, &iommu_spec); + if (!err_i) { + target = iommu_spec.np; + sid_i = iommu_spec.args[0]; + } + if (target) { of_node_put(target); } else { @@ -1156,8 +1163,11 @@ static int imx_pcie_add_lut_by_rid(struct imx_pcie *imx_pcie, u32 rid) err_i = -EINVAL; } - target = NULL; - err_m = of_map_msi_id(dev->of_node, rid, &target, &sid_m); + err_m = of_map_msi_id(dev->of_node, rid, NULL, &msi_spec); + if (!err_m) { + target = msi_spec.np; + sid_m = msi_spec.args[0]; + } /* * err_m target diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/pcie-apple.c index a0937b7b3c4d..c2cffc0659f4 100644 --- a/drivers/pci/controller/pcie-apple.c +++ b/drivers/pci/controller/pcie-apple.c @@ -755,6 +755,7 @@ static int apple_pcie_enable_device(struct pci_host_bridge *bridge, struct pci_d { u32 sid, rid = pci_dev_id(pdev); struct apple_pcie_port *port; + struct of_phandle_args iommu_spec = {}; int idx, err; port = apple_pcie_get_port(pdev); @@ -764,10 +765,12 @@ static int apple_pcie_enable_device(struct pci_host_bridge *bridge, struct pci_d dev_dbg(&pdev->dev, "added to bus %s, index %d\n", pci_name(pdev->bus->self), port->idx); - err = of_map_iommu_id(port->pcie->dev->of_node, rid, NULL, &sid); + err = of_map_iommu_id(port->pcie->dev->of_node, rid, &iommu_spec); if (err) return err; + of_node_put(iommu_spec.np); + sid = iommu_spec.args[0]; mutex_lock(&port->pcie->lock); idx = bitmap_find_free_region(port->sid_map, port->sid_map_sz, 0); diff --git a/drivers/xen/grant-dma-ops.c b/drivers/xen/grant-dma-ops.c index 1b7696b2d762..2aa1a772a0ff 100644 --- a/drivers/xen/grant-dma-ops.c +++ b/drivers/xen/grant-dma-ops.c @@ -319,13 +319,13 @@ static int xen_dt_grant_init_backend_domid(struct device *dev, struct device_node *np, domid_t *backend_domid) { - struct of_phandle_args iommu_spec = { .args_count = 1 }; + struct of_phandle_args iommu_spec = {}; if (dev_is_pci(dev)) { struct pci_dev *pdev = to_pci_dev(dev); u32 rid = PCI_DEVID(pdev->bus->number, pdev->devfn); - if (of_map_iommu_id(np, rid, &iommu_spec.np, iommu_spec.args)) { + if (of_map_iommu_id(np, rid, &iommu_spec)) { dev_dbg(dev, "Cannot translate ID\n"); return -ESRCH; } diff --git a/include/linux/of.h b/include/linux/of.h index fe841f3cc747..8548cd9eb4f1 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -463,13 +463,13 @@ bool of_console_check(const struct device_node *dn, char *name, int index); int of_map_id(const struct device_node *np, u32 id, const char *map_name, const char *map_mask_name, - struct device_node **target, u32 *id_out); + const struct device_node *filter_np, struct of_phandle_args *arg); int of_map_iommu_id(const struct device_node *np, u32 id, - struct device_node **target, u32 *id_out); + struct of_phandle_args *arg); int of_map_msi_id(const struct device_node *np, u32 id, - struct device_node **target, u32 *id_out); + const struct device_node *filter_np, struct of_phandle_args *arg); phys_addr_t of_dma_get_max_cpu_address(struct device_node *np); @@ -935,19 +935,21 @@ static inline void of_property_clear_flag(struct property *p, unsigned long flag static inline int of_map_id(const struct device_node *np, u32 id, const char *map_name, const char *map_mask_name, - struct device_node **target, u32 *id_out) + const struct device_node *filter_np, + struct of_phandle_args *arg) { return -EINVAL; } static inline int of_map_iommu_id(const struct device_node *np, u32 id, - struct device_node **target, u32 *id_out) + struct of_phandle_args *arg) { return -EINVAL; } static inline int of_map_msi_id(const struct device_node *np, u32 id, - struct device_node **target, u32 *id_out) + const struct device_node *filter_np, + struct of_phandle_args *arg) { return -EINVAL; } -- 2.34.1