Re: [PATCH v2 09/12] arm64: dts: imx8mp-sr-som: Correct PAD settings for PMIC_nINT

[Laurent Pinchart <laurent.pinchart@ideasonboard.com>]

On Thu, Mar 26, 2026 at 03:28:13PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> With commit 5d0efaf47ee90 ("regulator: pca9450: Correct interrupt type"),
> there might be interrupt storm for this board. Need to set PAD PUE and PU
> together to make pull up work properly.
> 
> Fixes: a009c0c66ecb4 ("arm64: dts: add description for solidrun imx8mp som and cubox-m")
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi
> index 3cdb0bc0ab721709fc892931ea00a538ec6216ff..c3f7daa773eaf335deb6cc976a5e120abdae5967 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi
> @@ -174,7 +174,7 @@ pmic: pmic@25 {
>  		pinctrl-0 = <&pmic_pins>;
>  		pinctrl-names = "default";
>  		interrupt-parent = <&gpio1>;
> -		interrupts = <3 GPIO_ACTIVE_LOW>;
> +		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;

This is a good change, but it should be mentioned in the commit message,
or split to a separate patch. Same for other patches in this series
where you make the same change.

>  		nxp,i2c-lt-enable;
>  
>  		regulators {
> @@ -417,7 +417,7 @@ MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03		0x160
>  
>  	pmic_pins: pinctrl-pmic-grp {
>  		fsl,pins = <
> -			MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03		0x41
> +			MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03		0x1c0
>  		>;
>  	};
>  

-- 
Regards,

Laurent Pinchart