* [PATCH v3] dt-bindings: timer: Add SiFive CLINT2
@ 2025-03-21 8:35 Nick Hu
2025-03-21 16:17 ` Conor Dooley
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Nick Hu @ 2025-03-21 8:35 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Paul Walmsley, Samuel Holland, Palmer Dabbelt,
Anup Patel
Cc: Nick Hu, linux-kernel, devicetree, linux-riscv
Add compatible string and property for the SiFive CLINT v2. The SiFive
CLINT v2 is incompatible with the SiFive CLINT v0 due to differences
in their control methods.
Signed-off-by: Nick Hu <nick.hu@sifive.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
---
- v3 changes:
- Add the reason for the incompatibility between sifive,clint2 and
sifive,clint0.
- v2 changes:
- Don't allow sifive,clint2 by itself. Add '-{}' to the first entry
- Mark the sifive,fine-ctr-bits as the required property when
the compatible includes the sifive,clint2
.../bindings/timer/sifive,clint.yaml | 22 +++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
index 76d83aea4e2b..34684cda8b15 100644
--- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
+++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
@@ -36,6 +36,12 @@ properties:
- starfive,jh7110-clint # StarFive JH7110
- starfive,jh8100-clint # StarFive JH8100
- const: sifive,clint0 # SiFive CLINT v0 IP block
+ - items:
+ - {}
+ - const: sifive,clint2 # SiFive CLINT v2 IP block
+ description:
+ SiFive CLINT v2 is the HRT that supports the Zicntr. The control of sifive,clint2
+ differs from that of sifive,clint0, making them incompatible.
- items:
- enum:
- allwinner,sun20i-d1-clint
@@ -62,6 +68,22 @@ properties:
minItems: 1
maxItems: 4095
+ sifive,fine-ctr-bits:
+ maximum: 15
+ description: The width in bits of the fine counter.
+
+if:
+ properties:
+ compatible:
+ contains:
+ const: sifive,clint2
+then:
+ required:
+ - sifive,fine-ctr-bits
+else:
+ properties:
+ sifive,fine-ctr-bits: false
+
additionalProperties: false
required:
--
2.17.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v3] dt-bindings: timer: Add SiFive CLINT2
2025-03-21 8:35 [PATCH v3] dt-bindings: timer: Add SiFive CLINT2 Nick Hu
@ 2025-03-21 16:17 ` Conor Dooley
2025-04-04 20:41 ` patchwork-bot+linux-riscv
2026-03-26 20:55 ` Charles Perry
2 siblings, 0 replies; 5+ messages in thread
From: Conor Dooley @ 2025-03-21 16:17 UTC (permalink / raw)
To: Nick Hu
Cc: Daniel Lezcano, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Paul Walmsley, Samuel Holland, Palmer Dabbelt,
Anup Patel, linux-kernel, devicetree, linux-riscv
[-- Attachment #1: Type: text/plain, Size: 2269 bytes --]
On Fri, Mar 21, 2025 at 04:35:06PM +0800, Nick Hu wrote:
> Add compatible string and property for the SiFive CLINT v2. The SiFive
> CLINT v2 is incompatible with the SiFive CLINT v0 due to differences
> in their control methods.
>
> Signed-off-by: Nick Hu <nick.hu@sifive.com>
> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> - v3 changes:
> - Add the reason for the incompatibility between sifive,clint2 and
> sifive,clint0.
> - v2 changes:
> - Don't allow sifive,clint2 by itself. Add '-{}' to the first entry
> - Mark the sifive,fine-ctr-bits as the required property when
> the compatible includes the sifive,clint2
>
> .../bindings/timer/sifive,clint.yaml | 22 +++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> index 76d83aea4e2b..34684cda8b15 100644
> --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> @@ -36,6 +36,12 @@ properties:
> - starfive,jh7110-clint # StarFive JH7110
> - starfive,jh8100-clint # StarFive JH8100
> - const: sifive,clint0 # SiFive CLINT v0 IP block
> + - items:
> + - {}
> + - const: sifive,clint2 # SiFive CLINT v2 IP block
> + description:
> + SiFive CLINT v2 is the HRT that supports the Zicntr. The control of sifive,clint2
> + differs from that of sifive,clint0, making them incompatible.
> - items:
> - enum:
> - allwinner,sun20i-d1-clint
> @@ -62,6 +68,22 @@ properties:
> minItems: 1
> maxItems: 4095
>
> + sifive,fine-ctr-bits:
> + maximum: 15
> + description: The width in bits of the fine counter.
> +
> +if:
> + properties:
> + compatible:
> + contains:
> + const: sifive,clint2
> +then:
> + required:
> + - sifive,fine-ctr-bits
> +else:
> + properties:
> + sifive,fine-ctr-bits: false
> +
> additionalProperties: false
>
> required:
> --
> 2.17.1
>
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v3] dt-bindings: timer: Add SiFive CLINT2
2025-03-21 8:35 [PATCH v3] dt-bindings: timer: Add SiFive CLINT2 Nick Hu
2025-03-21 16:17 ` Conor Dooley
@ 2025-04-04 20:41 ` patchwork-bot+linux-riscv
2026-03-26 20:55 ` Charles Perry
2 siblings, 0 replies; 5+ messages in thread
From: patchwork-bot+linux-riscv @ 2025-04-04 20:41 UTC (permalink / raw)
To: Nick Hu
Cc: linux-riscv, daniel.lezcano, tglx, robh, krzk+dt, conor+dt,
paul.walmsley, samuel.holland, palmer, anup, linux-kernel,
devicetree
Hello:
This patch was applied to riscv/linux.git (fixes)
by Daniel Lezcano <daniel.lezcano@linaro.org>:
On Fri, 21 Mar 2025 16:35:06 +0800 you wrote:
> Add compatible string and property for the SiFive CLINT v2. The SiFive
> CLINT v2 is incompatible with the SiFive CLINT v0 due to differences
> in their control methods.
>
> Signed-off-by: Nick Hu <nick.hu@sifive.com>
> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
>
> [...]
Here is the summary with links:
- [v3] dt-bindings: timer: Add SiFive CLINT2
https://git.kernel.org/riscv/c/0f920690a82c
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v3] dt-bindings: timer: Add SiFive CLINT2
2025-03-21 8:35 [PATCH v3] dt-bindings: timer: Add SiFive CLINT2 Nick Hu
2025-03-21 16:17 ` Conor Dooley
2025-04-04 20:41 ` patchwork-bot+linux-riscv
@ 2026-03-26 20:55 ` Charles Perry
2026-03-30 16:16 ` Conor Dooley
2 siblings, 1 reply; 5+ messages in thread
From: Charles Perry @ 2026-03-26 20:55 UTC (permalink / raw)
To: Nick Hu
Cc: Daniel Lezcano, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Paul Walmsley, Samuel Holland, Palmer Dabbelt,
Anup Patel, linux-kernel, devicetree, linux-riscv, charles.perry
On Fri, Mar 21, 2025 at 04:35:06PM +0800, Nick Hu wrote:
> Add compatible string and property for the SiFive CLINT v2. The SiFive
> CLINT v2 is incompatible with the SiFive CLINT v0 due to differences
> in their control methods.
Hello Nick,
Can you help me understand what is this different control method? I've
found that both OpenSBI [1] and U-Boot [2] use the same match data in their
clint driver which would indicate that they are compatible.
Also, do you know if there's an easy way to tell if a sifive clint is a v0
or v2?
Thanks,
Charles
[1]: https://elixir.bootlin.com/opensbi/v1.8.1/source/lib/utils/timer/fdt_timer_mtimer.c#L163
[2]: https://elixir.bootlin.com/u-boot/v2026.01/source/drivers/timer/riscv_aclint_timer.c#L86
>
> Signed-off-by: Nick Hu <nick.hu@sifive.com>
> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
> ---
> - v3 changes:
> - Add the reason for the incompatibility between sifive,clint2 and
> sifive,clint0.
> - v2 changes:
> - Don't allow sifive,clint2 by itself. Add '-{}' to the first entry
> - Mark the sifive,fine-ctr-bits as the required property when
> the compatible includes the sifive,clint2
>
> .../bindings/timer/sifive,clint.yaml | 22 +++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> index 76d83aea4e2b..34684cda8b15 100644
> --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> @@ -36,6 +36,12 @@ properties:
> - starfive,jh7110-clint # StarFive JH7110
> - starfive,jh8100-clint # StarFive JH8100
> - const: sifive,clint0 # SiFive CLINT v0 IP block
> + - items:
> + - {}
> + - const: sifive,clint2 # SiFive CLINT v2 IP block
> + description:
> + SiFive CLINT v2 is the HRT that supports the Zicntr. The control of sifive,clint2
> + differs from that of sifive,clint0, making them incompatible.
> - items:
> - enum:
> - allwinner,sun20i-d1-clint
> @@ -62,6 +68,22 @@ properties:
> minItems: 1
> maxItems: 4095
>
> + sifive,fine-ctr-bits:
> + maximum: 15
> + description: The width in bits of the fine counter.
> +
> +if:
> + properties:
> + compatible:
> + contains:
> + const: sifive,clint2
> +then:
> + required:
> + - sifive,fine-ctr-bits
> +else:
> + properties:
> + sifive,fine-ctr-bits: false
> +
> additionalProperties: false
>
> required:
> --
> 2.17.1
>
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v3] dt-bindings: timer: Add SiFive CLINT2
2026-03-26 20:55 ` Charles Perry
@ 2026-03-30 16:16 ` Conor Dooley
0 siblings, 0 replies; 5+ messages in thread
From: Conor Dooley @ 2026-03-30 16:16 UTC (permalink / raw)
To: Charles Perry
Cc: Nick Hu, Daniel Lezcano, Thomas Gleixner, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Samuel Holland,
Palmer Dabbelt, Anup Patel, linux-kernel, devicetree, linux-riscv
[-- Attachment #1: Type: text/plain, Size: 3448 bytes --]
On Thu, Mar 26, 2026 at 01:55:38PM -0700, Charles Perry wrote:
> On Fri, Mar 21, 2025 at 04:35:06PM +0800, Nick Hu wrote:
> > Add compatible string and property for the SiFive CLINT v2. The SiFive
> > CLINT v2 is incompatible with the SiFive CLINT v0 due to differences
> > in their control methods.
>
> Hello Nick,
>
> Can you help me understand what is this different control method? I've
> found that both OpenSBI [1] and U-Boot [2] use the same match data in their
> clint driver which would indicate that they are compatible.
Hmm, good point. I didn't see that the drivers were not doing anything
different. I guess really the clintv2 should fall back to the clintv0,
and the difference in hardware should be elaborated on.
I think I also dropped the ball on sifive,fine-ctr-bits, and that should
be removed and the counter width determined from the compatible.
There's no users for that yet I think, and there's no valid users of the
clintv2 compatible /at all/ so maybe it can just get culled.
>
> Also, do you know if there's an easy way to tell if a sifive clint is a v0
> or v2?
>
> Thanks,
> Charles
>
> [1]: https://elixir.bootlin.com/opensbi/v1.8.1/source/lib/utils/timer/fdt_timer_mtimer.c#L163
> [2]: https://elixir.bootlin.com/u-boot/v2026.01/source/drivers/timer/riscv_aclint_timer.c#L86
>
> >
> > Signed-off-by: Nick Hu <nick.hu@sifive.com>
> > Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
> > ---
> > - v3 changes:
> > - Add the reason for the incompatibility between sifive,clint2 and
> > sifive,clint0.
> > - v2 changes:
> > - Don't allow sifive,clint2 by itself. Add '-{}' to the first entry
> > - Mark the sifive,fine-ctr-bits as the required property when
> > the compatible includes the sifive,clint2
> >
> > .../bindings/timer/sifive,clint.yaml | 22 +++++++++++++++++++
> > 1 file changed, 22 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> > index 76d83aea4e2b..34684cda8b15 100644
> > --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> > +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> > @@ -36,6 +36,12 @@ properties:
> > - starfive,jh7110-clint # StarFive JH7110
> > - starfive,jh8100-clint # StarFive JH8100
> > - const: sifive,clint0 # SiFive CLINT v0 IP block
> > + - items:
> > + - {}
> > + - const: sifive,clint2 # SiFive CLINT v2 IP block
> > + description:
> > + SiFive CLINT v2 is the HRT that supports the Zicntr. The control of sifive,clint2
> > + differs from that of sifive,clint0, making them incompatible.
> > - items:
> > - enum:
> > - allwinner,sun20i-d1-clint
> > @@ -62,6 +68,22 @@ properties:
> > minItems: 1
> > maxItems: 4095
> >
> > + sifive,fine-ctr-bits:
> > + maximum: 15
> > + description: The width in bits of the fine counter.
> > +
> > +if:
> > + properties:
> > + compatible:
> > + contains:
> > + const: sifive,clint2
> > +then:
> > + required:
> > + - sifive,fine-ctr-bits
> > +else:
> > + properties:
> > + sifive,fine-ctr-bits: false
> > +
> > additionalProperties: false
> >
> > required:
> > --
> > 2.17.1
> >
> >
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2025-03-21 8:35 [PATCH v3] dt-bindings: timer: Add SiFive CLINT2 Nick Hu
2025-03-21 16:17 ` Conor Dooley
2025-04-04 20:41 ` patchwork-bot+linux-riscv
2026-03-26 20:55 ` Charles Perry
2026-03-30 16:16 ` Conor Dooley
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