From: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
To: Neil Armstrong <neil.armstrong@linaro.org>,
Jessica Zhang <jesszhan0024@gmail.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Thierry Reding <thierry.reding@gmail.com>,
Sam Ravnborg <sam@ravnborg.org>, Joseph Guo <qijian.guo@nxp.com>,
Marek Vasut <marek.vasut+renesas@mailbox.org>,
Andrzej Hajda <andrzej.hajda@intel.com>,
Robert Foss <rfoss@kernel.org>,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
Jonas Karlman <jonas@kwiboo.se>,
Jernej Skrabec <jernej.skrabec@gmail.com>
Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 4/4] drm/panel: simple: add Waveshare LCD panels
Date: Tue, 31 Mar 2026 18:44:13 +0300 [thread overview]
Message-ID: <20260331-ws-lcd-v2-4-a1add63b6eb6@oss.qualcomm.com> (raw)
In-Reply-To: <20260331-ws-lcd-v2-0-a1add63b6eb6@oss.qualcomm.com>
Waveshare have a serie of DSI panel kits with the DPI or LVDS panel
being attached to the DSI2DPI or DSI2LVDS bridge. The commit
46be11b678e0 ("drm/panel: simple: Add Waveshare 13.3" panel support")
added definitions for one of those panels, describe the rest of them.
Note, since the panels are hidden behind the bridges which are not being
programmed by the kernel, I could not confirm the pixel format for the
panels.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
drivers/gpu/drm/panel/panel-simple.c | 381 +++++++++++++++++++++++++++++++++++
1 file changed, 381 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 236bd56208cc..b2708a1fe464 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -5061,6 +5061,342 @@ static const struct panel_desc vl050_8048nt_c01 = {
.bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE,
};
+static const struct drm_display_mode waveshare_28_lcd_mode = {
+ .clock = 50000,
+ .hdisplay = 480,
+ .hsync_start = 480 + 150,
+ .hsync_end = 480 + 150 + 50,
+ .htotal = 480 + 150 + 50 + 150,
+ .vdisplay = 640,
+ .vsync_start = 640 + 150,
+ .vsync_end = 640 + 150 + 50,
+ .vtotal = 640 + 150 + 50 + 150,
+ .flags = DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PHSYNC,
+};
+
+static const struct panel_desc waveshare_28_lcd_panel = {
+ .modes = &waveshare_28_lcd_mode,
+ .num_modes = 1,
+ .bpc = 8,
+ .size = {
+ .width = 44,
+ .height = 58,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
+ .connector_type = DRM_MODE_CONNECTOR_DPI,
+ .bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE |
+ DRM_BUS_FLAG_SYNC_SAMPLE_POSEDGE,
+};
+
+static const struct drm_display_mode waveshare_34_lcd_c_mode = {
+ .clock = 50000,
+ .hdisplay = 800,
+ .hsync_start = 800 + 32,
+ .hsync_end = 800 + 32 + 6,
+ .htotal = 800 + 32 + 6 + 120,
+ .vdisplay = 800,
+ .vsync_start = 800 + 8,
+ .vsync_end = 800 + 8 + 4,
+ .vtotal = 800 + 8 + 4 + 16,
+};
+
+static const struct panel_desc waveshare_34_lcd_c_panel = {
+ .modes = &waveshare_34_lcd_c_mode,
+ .num_modes = 1,
+ .bpc = 8,
+ .size = {
+ .width = 88,
+ .height = 88,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
+ .connector_type = DRM_MODE_CONNECTOR_LVDS,
+};
+
+static const struct drm_display_mode waveshare_40_lcd_mode = {
+ .clock = 50000,
+ .hdisplay = 480,
+ .hsync_start = 480 + 150,
+ .hsync_end = 480 + 150 + 100,
+ .htotal = 480 + 150 + 100 + 150,
+ .vdisplay = 800,
+ .vsync_start = 800 + 20,
+ .vsync_end = 800 + 20 + 100,
+ .vtotal = 800 + 20 + 100 + 20,
+ .flags = DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PHSYNC,
+};
+
+static const struct panel_desc waveshare_40_lcd_panel = {
+ .modes = &waveshare_40_lcd_mode,
+ .num_modes = 1,
+ .bpc = 8,
+ .size = {
+ .width = 52,
+ .height = 87,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
+ .connector_type = DRM_MODE_CONNECTOR_DPI,
+ .bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE |
+ DRM_BUS_FLAG_SYNC_SAMPLE_POSEDGE,
+};
+
+static const struct drm_display_mode waveshare_40_lcd_c_mode = {
+ .clock = 50000,
+ .hdisplay = 720,
+ .hsync_start = 720 + 32,
+ .hsync_end = 720 + 32 + 200,
+ .htotal = 720 + 32 + 200 + 120,
+ .vdisplay = 720,
+ .vsync_start = 720 + 8,
+ .vsync_end = 720 + 8 + 4,
+ .vtotal = 720 + 8 + 4 + 16,
+};
+
+static const struct panel_desc waveshare_40_lcd_c_panel = {
+ .modes = &waveshare_40_lcd_c_mode,
+ .num_modes = 1,
+ .bpc = 8,
+ .size = {
+ .width = 102,
+ .height = 102,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
+ .connector_type = DRM_MODE_CONNECTOR_LVDS,
+};
+
+static const struct drm_display_mode waveshare_50_lcd_c_mode = {
+ .clock = 50000,
+ .hdisplay = 1024,
+ .hsync_start = 1024 + 100,
+ .hsync_end = 1024 + 100 + 100,
+ .htotal = 1024 + 100 + 100 + 100,
+ .vdisplay = 600,
+ .vsync_start = 600 + 10,
+ .vsync_end = 600 + 10 + 10,
+ .vtotal = 600 + 10 + 10 + 10,
+ .flags = DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PHSYNC,
+};
+
+static const struct panel_desc waveshare_50_lcd_c_panel = {
+ .modes = &waveshare_50_lcd_c_mode,
+ .num_modes = 1,
+ .bpc = 8,
+ .size = {
+ .width = 109,
+ .height = 66,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
+ .connector_type = DRM_MODE_CONNECTOR_DPI,
+ .bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE |
+ DRM_BUS_FLAG_SYNC_SAMPLE_POSEDGE,
+};
+
+static const struct drm_display_mode waveshare_50_lcd_d_mode = {
+ .clock = 83333,
+ .hdisplay = 720,
+ .hsync_start = 720 + 100,
+ .hsync_end = 720 + 100 + 80,
+ .htotal = 720 + 100 + 80 + 100,
+ .vdisplay = 1280,
+ .vsync_start = 1280 + 20,
+ .vsync_end = 1280 + 20 + 20,
+ .vtotal = 1280 + 20 + 20 + 20,
+};
+
+static const struct panel_desc waveshare_50_lcd_d_panel = {
+ .modes = &waveshare_50_lcd_d_mode,
+ .num_modes = 1,
+ .bpc = 8,
+ .size = {
+ .width = 62,
+ .height = 110,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
+ .connector_type = DRM_MODE_CONNECTOR_LVDS,
+};
+
+static const struct drm_display_mode waveshare_625_lcd_mode = {
+ .clock = 83333,
+ .hdisplay = 720,
+ .hsync_start = 720 + 50,
+ .hsync_end = 720 + 50 + 50,
+ .htotal = 720 + 50 + 50 + 50,
+ .vdisplay = 1560,
+ .vsync_start = 1560 + 20,
+ .vsync_end = 1560 + 20 + 20,
+ .vtotal = 1560 + 20 + 20 + 20,
+};
+
+static const struct panel_desc waveshare_625_lcd_panel = {
+ .modes = &waveshare_625_lcd_mode,
+ .num_modes = 1,
+ .bpc = 8,
+ .size = {
+ .width = 66,
+ .height = 144,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
+ .connector_type = DRM_MODE_CONNECTOR_LVDS,
+};
+
+static const struct panel_desc waveshare_70_lcd_c_panel = {
+ .modes = &waveshare_50_lcd_c_mode,
+ .num_modes = 1,
+ .bpc = 8,
+ .size = {
+ .width = 155,
+ .height = 87,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
+ .connector_type = DRM_MODE_CONNECTOR_DPI,
+ .bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE |
+ DRM_BUS_FLAG_SYNC_SAMPLE_POSEDGE,
+};
+
+static const struct drm_display_mode waveshare_80_lcd_c_mode;
+static const struct panel_desc waveshare_70_lcd_e_panel = {
+ .modes = &waveshare_80_lcd_c_mode,
+ .num_modes = 1,
+ .bpc = 8,
+ .size = {
+ .width = 152,
+ .height = 95,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
+ .connector_type = DRM_MODE_CONNECTOR_LVDS,
+};
+
+static const struct drm_display_mode waveshare_70_lcd_h_mode = {
+ .clock = 83333,
+ .hdisplay = 1280,
+ .hsync_start = 1280 + 64,
+ .hsync_end = 1280 + 64 + 64,
+ .htotal = 1280 + 64 + 64 + 64,
+ .vdisplay = 720,
+ .vsync_start = 720 + 64,
+ .vsync_end = 720 + 64 + 64,
+ .vtotal = 720 + 64 + 64 + 64,
+};
+
+static const struct panel_desc waveshare_70_lcd_h_panel = {
+ .modes = &waveshare_70_lcd_h_mode,
+ .num_modes = 1,
+ .bpc = 8,
+ .size = {
+ .width = 155,
+ .height = 88,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
+ .connector_type = DRM_MODE_CONNECTOR_LVDS,
+};
+
+static const struct drm_display_mode waveshare_79_lcd_mode = {
+ .clock = 50000,
+ .hdisplay = 400,
+ .hsync_start = 400 + 40,
+ .hsync_end = 400 + 40 + 30,
+ .htotal = 400 + 40 + 30 + 40,
+ .vdisplay = 1280,
+ .vsync_start = 1280 + 20,
+ .vsync_end = 1280 + 20 + 10,
+ .vtotal = 1280 + 20 + 10 + 20,
+};
+
+static const struct panel_desc waveshare_79_lcd_panel = {
+ .modes = &waveshare_79_lcd_mode,
+ .num_modes = 1,
+ .bpc = 8,
+ .size = {
+ .width = 60,
+ .height = 191,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
+ .connector_type = DRM_MODE_CONNECTOR_LVDS,
+};
+
+static const struct drm_display_mode waveshare_80_lcd_c_mode = {
+ .clock = 83333,
+ .hdisplay = 1280,
+ .hsync_start = 1280 + 156,
+ .hsync_end = 1280 + 156 + 20,
+ .htotal = 1280 + 156 + 20 + 40,
+ .vdisplay = 800,
+ .vsync_start = 800 + 40,
+ .vsync_end = 800 + 40 + 48,
+ .vtotal = 800 + 40 + 48 + 40,
+};
+
+static const struct panel_desc waveshare_80_lcd_c_panel = {
+ .modes = &waveshare_80_lcd_c_mode,
+ .num_modes = 1,
+ .bpc = 8,
+ .size = {
+ .width = 173,
+ .height = 108,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
+ .connector_type = DRM_MODE_CONNECTOR_LVDS,
+};
+
+static const struct drm_display_mode waveshare_88_lcd_mode = {
+ .clock = 83333,
+ .hdisplay = 480,
+ .hsync_start = 480 + 50,
+ .hsync_end = 480 + 50 + 50,
+ .htotal = 480 + 50 + 50 + 50,
+ .vdisplay = 1920,
+ .vsync_start = 1920 + 20,
+ .vsync_end = 1920 + 20 + 20,
+ .vtotal = 1920 + 20 + 20 + 20,
+};
+
+static const struct panel_desc waveshare_88_lcd_panel = {
+ .modes = &waveshare_88_lcd_mode,
+ .num_modes = 1,
+ .bpc = 8,
+ .size = {
+ .width = 56,
+ .height = 220,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
+ .connector_type = DRM_MODE_CONNECTOR_LVDS,
+};
+
+static const struct panel_desc waveshare_101_lcd_c_panel = {
+ .modes = &waveshare_80_lcd_c_mode,
+ .num_modes = 1,
+ .bpc = 8,
+ .size = {
+ .width = 217,
+ .height = 136,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
+ .connector_type = DRM_MODE_CONNECTOR_LVDS,
+};
+
+static const struct drm_display_mode waveshare_119_lcd_mode = {
+ .clock = 50000,
+ .hdisplay = 320,
+ .hsync_start = 320 + 60,
+ .hsync_end = 320 + 60 + 60,
+ .htotal = 320 + 60 + 60 + 60,
+ .vdisplay = 1480,
+ .vsync_start = 1480 + 60,
+ .vsync_end = 1480 + 60 + 60,
+ .vtotal = 1480 + 60 + 60 + 60,
+};
+
+static const struct panel_desc waveshare_119_lcd_panel = {
+ .modes = &waveshare_119_lcd_mode,
+ .num_modes = 1,
+ .bpc = 8,
+ .size = {
+ .width = 58,
+ .height = 268,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
+ .connector_type = DRM_MODE_CONNECTOR_LVDS,
+};
+
static const struct drm_display_mode waveshare_133inch_mode = {
.clock = 148500,
.hdisplay = 1920,
@@ -5697,6 +6033,51 @@ static const struct of_device_id platform_of_match[] = {
}, {
.compatible = "vxt,vl050-8048nt-c01",
.data = &vl050_8048nt_c01,
+ }, {
+ .compatible = "waveshare,2.8inch-panel",
+ .data = &waveshare_28_lcd_panel
+ }, {
+ .compatible = "waveshare,3.4inch-c-panel",
+ .data = &waveshare_34_lcd_c_panel
+ }, {
+ .compatible = "waveshare,4.0inch-panel",
+ .data = &waveshare_40_lcd_panel
+ }, {
+ .compatible = "waveshare,4.0inch-c-panel",
+ .data = &waveshare_40_lcd_c_panel
+ }, {
+ .compatible = "waveshare,5.0inch-c-panel",
+ .data = &waveshare_50_lcd_c_panel
+ }, {
+ .compatible = "waveshare,5.0inch-d-panel",
+ .data = &waveshare_50_lcd_d_panel
+ }, {
+ .compatible = "waveshare,6.25inch-panel",
+ .data = &waveshare_625_lcd_panel
+ }, {
+ .compatible = "waveshare,7.0inch-c-panel",
+ .data = &waveshare_70_lcd_c_panel
+ }, {
+ .compatible = "waveshare,7.0inch-e-panel",
+ .data = &waveshare_70_lcd_e_panel
+ }, {
+ .compatible = "waveshare,7.0inch-h-panel",
+ .data = &waveshare_70_lcd_h_panel
+ }, {
+ .compatible = "waveshare,7.9inch-panel",
+ .data = &waveshare_79_lcd_panel
+ }, {
+ .compatible = "waveshare,8.0inch-c-panel",
+ .data = &waveshare_80_lcd_c_panel
+ }, {
+ .compatible = "waveshare,8.8inch-panel",
+ .data = &waveshare_88_lcd_panel
+ }, {
+ .compatible = "waveshare,10.1inch-c-panel",
+ .data = &waveshare_101_lcd_c_panel
+ }, {
+ .compatible = "waveshare,11.9inch-panel",
+ .data = &waveshare_119_lcd_panel
}, {
.compatible = "waveshare,13.3inch-panel",
.data = &waveshare_133inch,
--
2.47.3
next prev parent reply other threads:[~2026-03-31 15:44 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-31 15:44 [PATCH v2 0/4] drm/panel: simple: add Waveshare LCD panels Dmitry Baryshkov
2026-03-31 15:44 ` [PATCH v2 1/4] dt-bindings: display: waveshare,dsp2dpi: describe DSI2LVDS setup Dmitry Baryshkov
2026-03-31 15:44 ` [PATCH v2 2/4] drm/bridge: waveshare-dsi: support DSI LCD kits with LVDS panels Dmitry Baryshkov
2026-03-31 15:44 ` [PATCH v2 3/4] dt-bindings: display: panel: add Waveshare LCD panels Dmitry Baryshkov
2026-03-31 15:44 ` Dmitry Baryshkov [this message]
2026-04-09 12:59 ` [PATCH v2 4/4] drm/panel: simple: " Neil Armstrong
2026-04-09 21:21 ` (subset) [PATCH v2 0/4] " Dmitry Baryshkov
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