* [PATCH 0/2] Fix active-low handling of MIPI CSI resets on i.MX8MQ
@ 2026-03-31 10:13 Robby Cai
2026-03-31 10:13 ` [PATCH 1/2] dt-bindings: reset: imx8mq: Add _N suffix to IMX8MQ_RESET_MIPI_CSI*_RESET Robby Cai
2026-03-31 10:13 ` [PATCH 2/2] reset: imx7: Fix handling of MIPI CSI resets on i.MX8MQ Robby Cai
0 siblings, 2 replies; 5+ messages in thread
From: Robby Cai @ 2026-03-31 10:13 UTC (permalink / raw)
To: p.zabel, robh, krzk+dt, conor+dt, Frank.Li, s.hauer, festevam
Cc: devicetree, kernel, imx, linux-arm-kernel, linux-kernel,
aisheng.dong
Hi all,
This series updates the Device Tree bindings and reset controller driver
to correctly reflect the active-low polarity of the MIPI CSI reset lines
on i.MX8MQ.
The MIPI CSI reset signals are active-low, but the original reset
identifiers and driver implementation did not clearly indicate or handle
this polarity. Patch 1 updates the DT binding header to add *_RESET_N
variants for the MIPI CSI reset definitions, while keeping the old names
temporarily for DT ABI compatibility. Patch 2 updates the imx7 reset
controller driver to correctly treat these resets as active-low.
Thanks,
Robby
Robby Cai (2):
dt-bindings: reset: imx8mq: Add _N suffix to
IMX8MQ_RESET_MIPI_CSI*_RESET
reset: imx7: Fix handling of MIPI CSI resets on i.MX8MQ
drivers/reset/reset-imx7.c | 18 ++++++++++++------
include/dt-bindings/reset/imx8mq-reset.h | 18 ++++++++++++------
2 files changed, 24 insertions(+), 12 deletions(-)
--
2.37.1
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH 1/2] dt-bindings: reset: imx8mq: Add _N suffix to IMX8MQ_RESET_MIPI_CSI*_RESET 2026-03-31 10:13 [PATCH 0/2] Fix active-low handling of MIPI CSI resets on i.MX8MQ Robby Cai @ 2026-03-31 10:13 ` Robby Cai 2026-03-31 12:45 ` Philipp Zabel 2026-04-01 7:41 ` Krzysztof Kozlowski 2026-03-31 10:13 ` [PATCH 2/2] reset: imx7: Fix handling of MIPI CSI resets on i.MX8MQ Robby Cai 1 sibling, 2 replies; 5+ messages in thread From: Robby Cai @ 2026-03-31 10:13 UTC (permalink / raw) To: p.zabel, robh, krzk+dt, conor+dt, Frank.Li, s.hauer, festevam Cc: devicetree, kernel, imx, linux-arm-kernel, linux-kernel, aisheng.dong The assert logic of the MIPI CSI reset signals is active-low on i.MX8MQ, but the existing names do not indicate this explicitly. To improve consistency and clarity, append the _N suffix to all IMX8MQ_RESET_MIPI_CSI*_RESET definitions. The deprecated IMX8MQ_RESET_MIPI_CSI*_RESET versions remain temporarily for DT ABI compatibility and will be removed at an appropriate time in the future. Signed-off-by: Robby Cai <robby.cai@nxp.com> --- include/dt-bindings/reset/imx8mq-reset.h | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/include/dt-bindings/reset/imx8mq-reset.h b/include/dt-bindings/reset/imx8mq-reset.h index 705870693ec2..83a155dbbd4a 100644 --- a/include/dt-bindings/reset/imx8mq-reset.h +++ b/include/dt-bindings/reset/imx8mq-reset.h @@ -46,12 +46,18 @@ #define IMX8MQ_RESET_PCIEPHY2_PERST 35 /* i.MX8MM/i.MX8MN does NOT support */ #define IMX8MQ_RESET_PCIE2_CTRL_APPS_EN 36 /* i.MX8MM/i.MX8MN does NOT support */ #define IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF 37 /* i.MX8MM/i.MX8MN does NOT support */ -#define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET 38 /* i.MX8MM/i.MX8MN does NOT support */ -#define IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET 39 /* i.MX8MM/i.MX8MN does NOT support */ -#define IMX8MQ_RESET_MIPI_CSI1_ESC_RESET 40 /* i.MX8MM/i.MX8MN does NOT support */ -#define IMX8MQ_RESET_MIPI_CSI2_CORE_RESET 41 /* i.MX8MM/i.MX8MN does NOT support */ -#define IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET 42 /* i.MX8MM/i.MX8MN does NOT support */ -#define IMX8MQ_RESET_MIPI_CSI2_ESC_RESET 43 /* i.MX8MM/i.MX8MN does NOT support */ +#define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET 38 /* Deprecated. Use *_RESET_N instead */ +#define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET_N 38 /* i.MX8MM/i.MX8MN does NOT support */ +#define IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET 39 /* Deprecated. Use *_RESET_N instead */ +#define IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET_N 39 /* i.MX8MM/i.MX8MN does NOT support */ +#define IMX8MQ_RESET_MIPI_CSI1_ESC_RESET 40 /* Deprecated. Use *_RESET_N instead */ +#define IMX8MQ_RESET_MIPI_CSI1_ESC_RESET_N 40 /* i.MX8MM/i.MX8MN does NOT support */ +#define IMX8MQ_RESET_MIPI_CSI2_CORE_RESET 41 /* Deprecated. Use *_RESET_N instead */ +#define IMX8MQ_RESET_MIPI_CSI2_CORE_RESET_N 41 /* i.MX8MM/i.MX8MN does NOT support */ +#define IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET 42 /* Deprecated. Use *_RESET_N instead */ +#define IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET_N 42 /* i.MX8MM/i.MX8MN does NOT support */ +#define IMX8MQ_RESET_MIPI_CSI2_ESC_RESET 43 /* Deprecated. Use *_RESET_N instead */ +#define IMX8MQ_RESET_MIPI_CSI2_ESC_RESET_N 43 /* i.MX8MM/i.MX8MN does NOT support */ #define IMX8MQ_RESET_DDRC1_PRST 44 /* i.MX8MN does NOT support */ #define IMX8MQ_RESET_DDRC1_CORE_RESET 45 /* i.MX8MN does NOT support */ #define IMX8MQ_RESET_DDRC1_PHY_RESET 46 /* i.MX8MN does NOT support */ -- 2.37.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] dt-bindings: reset: imx8mq: Add _N suffix to IMX8MQ_RESET_MIPI_CSI*_RESET 2026-03-31 10:13 ` [PATCH 1/2] dt-bindings: reset: imx8mq: Add _N suffix to IMX8MQ_RESET_MIPI_CSI*_RESET Robby Cai @ 2026-03-31 12:45 ` Philipp Zabel 2026-04-01 7:41 ` Krzysztof Kozlowski 1 sibling, 0 replies; 5+ messages in thread From: Philipp Zabel @ 2026-03-31 12:45 UTC (permalink / raw) To: Robby Cai, robh, krzk+dt, conor+dt, Frank.Li, s.hauer, festevam Cc: devicetree, kernel, imx, linux-arm-kernel, linux-kernel, aisheng.dong On Di, 2026-03-31 at 18:13 +0800, Robby Cai wrote: > The assert logic of the MIPI CSI reset signals is active-low on i.MX8MQ, > but the existing names do not indicate this explicitly. To improve > consistency and clarity, append the _N suffix to all > IMX8MQ_RESET_MIPI_CSI*_RESET definitions. The deprecated > IMX8MQ_RESET_MIPI_CSI*_RESET versions remain temporarily for DT ABI > compatibility and will be removed at an appropriate time in the future. The register description in the latest reference manual I can download, IMX8MDQLQRM Rev. 3.1 (06/2021), still call these bits MIPI_CSI1_CORE_RESET and so on (without _N). There is no mention of polarity in the bitfield description. Is a documentation update planned? Right now I'd say this improves clarity, but reduces consistency with existing documentation. Are these bits self-clearing, or can the reset be asserted by writing 0? As it stands, the CSI driver using these resets, imx8mq-mipi-csi2.c, only calls reset_control_assert() in imx8mq_mipi_csi_sw_reset(): /* * these are most likely self-clearing reset bits. to make it * more clear, the reset-imx7 driver should implement the * .reset() operation. */ ret = reset_control_assert(state->rst); This will probably have to be turned into a deassert together with the reset driver change. regards Philipp ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] dt-bindings: reset: imx8mq: Add _N suffix to IMX8MQ_RESET_MIPI_CSI*_RESET 2026-03-31 10:13 ` [PATCH 1/2] dt-bindings: reset: imx8mq: Add _N suffix to IMX8MQ_RESET_MIPI_CSI*_RESET Robby Cai 2026-03-31 12:45 ` Philipp Zabel @ 2026-04-01 7:41 ` Krzysztof Kozlowski 1 sibling, 0 replies; 5+ messages in thread From: Krzysztof Kozlowski @ 2026-04-01 7:41 UTC (permalink / raw) To: Robby Cai Cc: p.zabel, robh, krzk+dt, conor+dt, Frank.Li, s.hauer, festevam, devicetree, kernel, imx, linux-arm-kernel, linux-kernel, aisheng.dong On Tue, Mar 31, 2026 at 06:13:30PM +0800, Robby Cai wrote: > The assert logic of the MIPI CSI reset signals is active-low on i.MX8MQ, > but the existing names do not indicate this explicitly. To improve > consistency and clarity, append the _N suffix to all > IMX8MQ_RESET_MIPI_CSI*_RESET definitions. The deprecated > IMX8MQ_RESET_MIPI_CSI*_RESET versions remain temporarily for DT ABI > compatibility and will be removed at an appropriate time in the future. > > Signed-off-by: Robby Cai <robby.cai@nxp.com> > --- > include/dt-bindings/reset/imx8mq-reset.h | 18 ++++++++++++------ > 1 file changed, 12 insertions(+), 6 deletions(-) > > diff --git a/include/dt-bindings/reset/imx8mq-reset.h b/include/dt-bindings/reset/imx8mq-reset.h > index 705870693ec2..83a155dbbd4a 100644 > --- a/include/dt-bindings/reset/imx8mq-reset.h > +++ b/include/dt-bindings/reset/imx8mq-reset.h > @@ -46,12 +46,18 @@ > #define IMX8MQ_RESET_PCIEPHY2_PERST 35 /* i.MX8MM/i.MX8MN does NOT support */ > #define IMX8MQ_RESET_PCIE2_CTRL_APPS_EN 36 /* i.MX8MM/i.MX8MN does NOT support */ > #define IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF 37 /* i.MX8MM/i.MX8MN does NOT support */ > -#define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET 38 /* i.MX8MM/i.MX8MN does NOT support */ > -#define IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET 39 /* i.MX8MM/i.MX8MN does NOT support */ > -#define IMX8MQ_RESET_MIPI_CSI1_ESC_RESET 40 /* i.MX8MM/i.MX8MN does NOT support */ > -#define IMX8MQ_RESET_MIPI_CSI2_CORE_RESET 41 /* i.MX8MM/i.MX8MN does NOT support */ > -#define IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET 42 /* i.MX8MM/i.MX8MN does NOT support */ > -#define IMX8MQ_RESET_MIPI_CSI2_ESC_RESET 43 /* i.MX8MM/i.MX8MN does NOT support */ > +#define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET 38 /* Deprecated. Use *_RESET_N instead */ > +#define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET_N 38 /* i.MX8MM/i.MX8MN does NOT support */ That's quite a churn for no need. The entire point of these values being the binding is that it describes the ABI for SW and DTS, not your hardware registers. Whether signal is active low or high is kind of irrelevant. Linux uses it exactly the same way. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 2/2] reset: imx7: Fix handling of MIPI CSI resets on i.MX8MQ 2026-03-31 10:13 [PATCH 0/2] Fix active-low handling of MIPI CSI resets on i.MX8MQ Robby Cai 2026-03-31 10:13 ` [PATCH 1/2] dt-bindings: reset: imx8mq: Add _N suffix to IMX8MQ_RESET_MIPI_CSI*_RESET Robby Cai @ 2026-03-31 10:13 ` Robby Cai 1 sibling, 0 replies; 5+ messages in thread From: Robby Cai @ 2026-03-31 10:13 UTC (permalink / raw) To: p.zabel, robh, krzk+dt, conor+dt, Frank.Li, s.hauer, festevam Cc: devicetree, kernel, imx, linux-arm-kernel, linux-kernel, aisheng.dong The MIPI CSI reset signals on i.MX8MQ are active-low, but the reset controller driver previously treated them as active-high, resulting in incorrect assert/deassert behavior. Update the reset handling logic to correctly process these active-low reset lines. Signed-off-by: Robby Cai <robby.cai@nxp.com> --- drivers/reset/reset-imx7.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c index dd01fe11c5cb..b7048e1f10df 100644 --- a/drivers/reset/reset-imx7.c +++ b/drivers/reset/reset-imx7.c @@ -202,12 +202,12 @@ static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = { [IMX8MQ_RESET_PCIEPHY2_PERST] = { SRC_PCIE2_RCR, BIT(3) }, [IMX8MQ_RESET_PCIE2_CTRL_APPS_EN] = { SRC_PCIE2_RCR, BIT(6) }, [IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF] = { SRC_PCIE2_RCR, BIT(11) }, - [IMX8MQ_RESET_MIPI_CSI1_CORE_RESET] = { SRC_MIPIPHY1_RCR, BIT(0) }, - [IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET] = { SRC_MIPIPHY1_RCR, BIT(1) }, - [IMX8MQ_RESET_MIPI_CSI1_ESC_RESET] = { SRC_MIPIPHY1_RCR, BIT(2) }, - [IMX8MQ_RESET_MIPI_CSI2_CORE_RESET] = { SRC_MIPIPHY2_RCR, BIT(0) }, - [IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET] = { SRC_MIPIPHY2_RCR, BIT(1) }, - [IMX8MQ_RESET_MIPI_CSI2_ESC_RESET] = { SRC_MIPIPHY2_RCR, BIT(2) }, + [IMX8MQ_RESET_MIPI_CSI1_CORE_RESET_N] = { SRC_MIPIPHY1_RCR, BIT(0) }, + [IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET_N] = { SRC_MIPIPHY1_RCR, BIT(1) }, + [IMX8MQ_RESET_MIPI_CSI1_ESC_RESET_N] = { SRC_MIPIPHY1_RCR, BIT(2) }, + [IMX8MQ_RESET_MIPI_CSI2_CORE_RESET_N] = { SRC_MIPIPHY2_RCR, BIT(0) }, + [IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET_N] = { SRC_MIPIPHY2_RCR, BIT(1) }, + [IMX8MQ_RESET_MIPI_CSI2_ESC_RESET_N] = { SRC_MIPIPHY2_RCR, BIT(2) }, [IMX8MQ_RESET_DDRC1_PRST] = { SRC_DDRC_RCR, BIT(0) }, [IMX8MQ_RESET_DDRC1_CORE_RESET] = { SRC_DDRC_RCR, BIT(1) }, [IMX8MQ_RESET_DDRC1_PHY_RESET] = { SRC_DDRC_RCR, BIT(2) }, @@ -236,6 +236,12 @@ static int imx8mq_reset_set(struct reset_controller_dev *rcdev, case IMX8MQ_RESET_PCIE_CTRL_APPS_EN: case IMX8MQ_RESET_PCIE2_CTRL_APPS_EN: + case IMX8MQ_RESET_MIPI_CSI1_CORE_RESET_N: + case IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET_N: + case IMX8MQ_RESET_MIPI_CSI1_ESC_RESET_N: + case IMX8MQ_RESET_MIPI_CSI2_CORE_RESET_N: + case IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET_N: + case IMX8MQ_RESET_MIPI_CSI2_ESC_RESET_N: case IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N: case IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N: case IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N: -- 2.37.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2026-04-01 7:41 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-03-31 10:13 [PATCH 0/2] Fix active-low handling of MIPI CSI resets on i.MX8MQ Robby Cai 2026-03-31 10:13 ` [PATCH 1/2] dt-bindings: reset: imx8mq: Add _N suffix to IMX8MQ_RESET_MIPI_CSI*_RESET Robby Cai 2026-03-31 12:45 ` Philipp Zabel 2026-04-01 7:41 ` Krzysztof Kozlowski 2026-03-31 10:13 ` [PATCH 2/2] reset: imx7: Fix handling of MIPI CSI resets on i.MX8MQ Robby Cai
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