From: Rob Herring <robh@kernel.org>
To: Florian Eckert <fe@dev.tdt.de>
Cc: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Johan Hovold" <johan+linaro@kernel.org>,
"Sajid Dalvi" <sdalvi@google.com>,
"Ajay Agarwal" <ajayagarwal@google.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Rahul Tanwar" <rtanwar@maxlinear.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, Eckert.Florian@googlemail.com,
ms@dev.tdt.de
Subject: Re: [PATCH v2 6/7] dt-bindings: PCI: intel,lgm-pcie: Make atu resource mandatory
Date: Tue, 31 Mar 2026 10:21:50 -0500 [thread overview]
Message-ID: <20260331152150.GA1255126-robh@kernel.org> (raw)
In-Reply-To: <20260330-pcie-intel-gw-v2-6-8bd07367a298@dev.tdt.de>
On Mon, Mar 30, 2026 at 11:07:16AM +0200, Florian Eckert wrote:
> The ATU information is already set in the dwc core if it is specified in
> the DTS. The driver uses its own value here [1]. This information is
> hardware specific and should therefore be maintained in the DTS rather
> than in the source.
>
> Backwards compatibility is not an issue here [5], as the driver is
> exclusively used by Maxlinear.
>
> Old DTS entry for PCIe:
>
> reg = <0xd1000000 0x1000>,
> <0xd3000000 0x20000>,
> <0xd0c41000.0x1000>;
> reg-names = "dbi", "config", "app";
>
> New DTS entry for PCIe:
>
> reg = <0xd1000000 0x1000>,
> <0xd10c0000 0x1000>,
> <0xd3000000 0x20000>,
> <0xd0c41000.0x1000>;
> reg-names = "dbi", "atu", "config", "app";
>
> [1] https://elixir.bootlin.com/linux/v6.19.10/source/drivers/pci/controller/dwc/pcie-intel-gw.c#L301
> [2] https://lore.kernel.org/all/BY3PR19MB507667CE7531D863E1E5F8AEBDD82@BY3PR19MB5076.namprd19.prod.outlook.com/
>
> Signed-off-by: Florian Eckert <fe@dev.tdt.de>
> ---
> Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml b/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
> index 54e2890ae6314ac6847fc23f49440d05d66d87d4..e4b781f57e8ae84a3ffc33635a421e1a5761587e 100644
> --- a/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
> @@ -29,12 +29,14 @@ properties:
> reg:
> items:
> - description: Controller control and status registers.
> + - description: Internal Address Translation Unit (iATU) registers.
> - description: PCIe configuration registers.
> - description: Controller application registers.
>
> reg-names:
> items:
> - const: dbi
> + - const: atu
Put this at the end and add 'minItems: 3' and you avoid any ABI issues.
> - const: config
> - const: app
>
next prev parent reply other threads:[~2026-03-31 15:21 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-30 9:07 [PATCH v2 0/7] PCI: intel-gw: Fixes to make the driver working again Florian Eckert
2026-03-30 9:07 ` [PATCH v2 1/7] PCI: intel-gw: Remove unused define Florian Eckert
2026-03-30 9:07 ` [PATCH v2 2/7] PCI: intel-gw: Move interrupt enable to own function Florian Eckert
2026-03-30 9:07 ` [PATCH v2 3/7] PCI: intel-gw: Enable clock before phy init Florian Eckert
2026-03-30 9:07 ` [PATCH v2 4/7] PCI: intel-gw: Add start_link callback function Florian Eckert
2026-04-01 3:45 ` kernel test robot
2026-04-01 4:10 ` kernel test robot
2026-03-30 9:07 ` [PATCH v2 5/7] PCI: intel-gw: Remove atu base assignment Florian Eckert
2026-03-30 9:07 ` [PATCH v2 6/7] dt-bindings: PCI: intel,lgm-pcie: Make atu resource mandatory Florian Eckert
2026-03-30 9:50 ` Krzysztof Kozlowski
2026-03-30 10:52 ` Florian Eckert
2026-03-31 7:36 ` Krzysztof Kozlowski
2026-03-30 10:35 ` Rob Herring (Arm)
2026-03-31 15:21 ` Rob Herring [this message]
2026-04-01 11:20 ` Florian Eckert
2026-03-30 9:07 ` [PATCH v2 7/7] MAINTAINERS: Remove bouncing intel-gw maintainer Florian Eckert
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