From: Conor Dooley <conor@kernel.org>
To: Mina Chou <minachou@andestech.com>
Cc: pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu,
alex@ghiti.fr, geert+renesas@glider.be,
prabhakar.mahadev-lad.rj@bp.renesas.com, magnus.damm@gmail.com,
ben717@andestech.com, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, jonathan.cameron@huawei.com,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
tim609@andestech.com, alex749@andestech.com, az70021@gmail.com
Subject: Re: [PATCH 1/7] cache: ax45mp_cache: refactor cache driver for generic Andes platform support
Date: Wed, 1 Apr 2026 10:25:14 +0100 [thread overview]
Message-ID: <20260401-hulk-retract-2d4bd7f42f14@spud> (raw)
In-Reply-To: <acyDUU3FdAAPWfnS@atcsi01.andestech.com>
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On Wed, Apr 01, 2026 at 10:30:41AM +0800, Mina Chou wrote:
> Thank you both, Krzysztof and Conor, for the detailed review.
> I appreciate the feedback and admit this series needed more work
> before sending. I will address all the issues in the next version.
People making mistakes is whatever, as long as they don't keep making
them!
> A bit of background on the motivation: the main goal of this series
> was to prepare the Andes cache driver for a SoC Allwinner Avaotaf1 V821,
> which uses the Andes A27L2 CPU. We wanted to share a single cache driver
> across different Andes CPU variants, which is why we tried to move toward
I don't mind the kernel-side renaming all that much, the compatible
rename is what's problematic.
> more generic naming in both the driver and the compatible strings.
>
> We have two questions we'd appreciate guidance on:
> a) On compatible string naming: We'll drop patch [5/7][6/7] and won't
> rename any existing compatible strings. But we'd like to confirm
> the preferred approach for A27L2: would it be acceptable to add
> a generic compatible (andestech,andes-llcache) as an addition?
> If so, would a CPU-specific compatible (andestech,a27l2-cache)
> still be required alongside it?
Yes. I think that this cpu-specific compatible is what actually has
value, and adding something generic to all andes CPUs is a "nice to
have" convenience. Also, "andestech,andes-llcache" is a bit of a weak
name, repeating "andes" has no value. There's no code-name or something
for the IP that we could use instead of the second "andes" here?
> b) On Avaotaf1 V821 support: We are not in a position to submit the
> DTS on behalf of Allwinner. However, we would like to add the
> corresponding compatible strings to the existing binding
> documents (andestech,andes-llcache.yaml, sifive,plic-1.0.0.yaml,
> and riscv/cpus.yaml) in advance, so that the bindings are ready
> when Allwinner eventually submits their DTS.
> Would it be acceptable to upstream binding-only changes without
> an accompanying DTS at this stage?
Yes, of course. You're not willing to submit the dts, which is
understandable, but for the cache and plic bindings, you are able to add
the soc-specific compatibles for this device, right?
> For the next version, we're thinking of keeping only the changes
> needed to generalize the cache driver, and dropping the improvements
> for now to keep things focused. If you have any suggestion on how
> to approach this, we'd love to hear it.
Whatever you want. The improvements (or at least the things I think
are improvements) seem worth having. The problem was just patches doing
multiple things at once. If you decide to only do the generalisation,
that's fine, just make sure it is broken down so that each of your
bullet points in the commit messages.
Cheers,
Conor.
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next prev parent reply other threads:[~2026-04-01 9:25 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-30 10:27 [PATCH 0/7] refactor Andes cache driver for generic platform support Hui Min Mina Chou
2026-03-30 10:27 ` [PATCH 1/7] cache: ax45mp_cache: refactor cache driver for generic Andes " Hui Min Mina Chou
2026-03-30 13:01 ` Krzysztof Kozlowski
2026-03-30 15:54 ` Conor Dooley
2026-04-01 2:30 ` Mina Chou
2026-04-01 9:25 ` Conor Dooley [this message]
2026-03-30 10:27 ` [PATCH 2/7] cache: andes_llcache: refactor initialization and cache operations Hui Min Mina Chou
2026-03-30 13:02 ` Krzysztof Kozlowski
2026-03-30 15:23 ` Conor Dooley
2026-03-30 16:05 ` Conor Dooley
2026-03-31 8:31 ` Krzysztof Kozlowski
2026-03-30 10:27 ` [PATCH 3/7] cache: andes_llcache: improve performance of LLC operation Hui Min Mina Chou
2026-03-30 16:04 ` Conor Dooley
2026-03-30 10:27 ` [PATCH 4/7] cache: andes_llcache: centralize cache ops and use native WBINVAL Hui Min Mina Chou
2026-03-30 10:27 ` [PATCH 5/7] dt-bindings: cache: ax45mp-cache: rename ax45mp-cache to llcache Hui Min Mina Chou
2026-03-30 12:51 ` Rob Herring (Arm)
2026-03-30 13:00 ` Krzysztof Kozlowski
2026-03-30 15:29 ` Conor Dooley
2026-03-30 15:28 ` Conor Dooley
2026-03-30 10:27 ` [PATCH 6/7] dts: riscv: update cache compatible strings to LLC Hui Min Mina Chou
2026-03-30 13:03 ` Krzysztof Kozlowski
2026-03-30 10:27 ` [PATCH 7/7] MAINTAINERS: Add maintainers for Andes cache driver Hui Min Mina Chou
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