From: John Madieu <john.madieu.xa@bp.renesas.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>,
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>,
Vinod Koul <vkoul@kernel.org>, Mark Brown <broonie@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Frank Li <Frank.Li@kernel.org>,
Liam Girdwood <lgirdwood@gmail.com>,
Magnus Damm <magnus.damm@gmail.com>,
Thomas Gleixner <tglx@kernel.org>,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Claudiu Beznea <claudiu.beznea@tuxon.dev>,
Biju Das <biju.das.jz@bp.renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
John Madieu <john.madieu@gmail.com>,
linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
dmaengine@vger.kernel.org, linux-sound@vger.kernel.org,
John Madieu <john.madieu.xa@bp.renesas.com>
Subject: [PATCH v2 19/24] arm64: dts: renesas: rzv2h: Add audio clock inputs
Date: Thu, 2 Apr 2026 11:05:18 +0200 [thread overview]
Message-ID: <20260402090524.9137-20-john.madieu.xa@bp.renesas.com> (raw)
In-Reply-To: <20260402090524.9137-1-john.madieu.xa@bp.renesas.com>
Model external audio clock inputs as CPG input clocks for RZ/V2H family
SoCs (RZ/V2H, RZ/V2N, RZ/G3E), allowing the Audio Clock Generator (ADG)
to derive internal audio clocks from these external sources.
The clock frequencies are board-specific and must be overridden in the
board DTS files.
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
---
Changes:
v2: No changes
arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 27 ++++++++++++++++++++--
arch/arm64/boot/dts/renesas/r9a09g056.dtsi | 27 ++++++++++++++++++++--
arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 27 ++++++++++++++++++++--
3 files changed, 75 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
index 95a4e30a064d..1ff48c8f98e1 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
@@ -14,6 +14,27 @@ / {
#size-cells = <2>;
interrupt-parent = <&gic>;
+ audio_clka: audio-clka {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board */
+ clock-frequency = <0>;
+ };
+
+ audio_clkb: audio-clkb {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board */
+ clock-frequency = <0>;
+ };
+
+ audio_clkc: audio-clkc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board */
+ clock-frequency = <0>;
+ };
+
audio_extal_clk: audio-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -270,8 +291,10 @@ pinctrl: pinctrl@10410000 {
cpg: clock-controller@10420000 {
compatible = "renesas,r9a09g047-cpg";
reg = <0 0x10420000 0 0x10000>;
- clocks = <&audio_extal_clk>, <&rtxin_clk>, <&qextal_clk>;
- clock-names = "audio_extal", "rtxin", "qextal";
+ clocks = <&audio_extal_clk>, <&rtxin_clk>, <&qextal_clk>,
+ <&audio_clka>, <&audio_clkb>, <&audio_clkc>;
+ clock-names = "audio_extal", "rtxin", "qextal",
+ "audio_clka", "audio_clkb", "audio_clkc";
#clock-cells = <2>;
#reset-cells = <1>;
#power-domain-cells = <0>;
diff --git a/arch/arm64/boot/dts/renesas/r9a09g056.dtsi b/arch/arm64/boot/dts/renesas/r9a09g056.dtsi
index 40525470194e..d2ac78006f15 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g056.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g056.dtsi
@@ -32,6 +32,27 @@ / {
#size-cells = <2>;
interrupt-parent = <&gic>;
+ audio_clka: audio-clka {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board */
+ clock-frequency = <0>;
+ };
+
+ audio_clkb: audio-clkb {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board */
+ clock-frequency = <0>;
+ };
+
+ audio_clkc: audio-clkc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board */
+ clock-frequency = <0>;
+ };
+
audio_extal_clk: audio-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -293,8 +314,10 @@ pinctrl: pinctrl@10410000 {
cpg: clock-controller@10420000 {
compatible = "renesas,r9a09g056-cpg";
reg = <0 0x10420000 0 0x10000>;
- clocks = <&audio_extal_clk>, <&rtxin_clk>, <&qextal_clk>;
- clock-names = "audio_extal", "rtxin", "qextal";
+ clocks = <&audio_extal_clk>, <&rtxin_clk>, <&qextal_clk>,
+ <&audio_clka>, <&audio_clkb>, <&audio_clkc>;
+ clock-names = "audio_extal", "rtxin", "qextal",
+ "audio_clka", "audio_clkb", "audio_clkc";
#clock-cells = <2>;
#reset-cells = <1>;
#power-domain-cells = <0>;
diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
index 9581af58024e..e15b47dc93d4 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
@@ -14,6 +14,27 @@ / {
#size-cells = <2>;
interrupt-parent = <&gic>;
+ audio_clka: audio-clka {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board */
+ clock-frequency = <0>;
+ };
+
+ audio_clkb: audio-clkb {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board */
+ clock-frequency = <0>;
+ };
+
+ audio_clkc: audio-clkc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board */
+ clock-frequency = <0>;
+ };
+
audio_extal_clk: audio-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -275,8 +296,10 @@ pinctrl: pinctrl@10410000 {
cpg: clock-controller@10420000 {
compatible = "renesas,r9a09g057-cpg";
reg = <0 0x10420000 0 0x10000>;
- clocks = <&audio_extal_clk>, <&rtxin_clk>, <&qextal_clk>;
- clock-names = "audio_extal", "rtxin", "qextal";
+ clocks = <&audio_extal_clk>, <&rtxin_clk>, <&qextal_clk>,
+ <&audio_clka>, <&audio_clkb>, <&audio_clkc>;
+ clock-names = "audio_extal", "rtxin", "qextal",
+ "audio_clka", "audio_clkb", "audio_clkc";
#clock-cells = <2>;
#reset-cells = <1>;
#power-domain-cells = <0>;
--
2.25.1
next prev parent reply other threads:[~2026-04-02 9:09 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-02 9:04 [PATCH v2 00/24] ASoC: rsnd: Add audio support for the Renesas RZ/G3E SoC John Madieu
2026-04-02 9:05 ` [PATCH v2 01/24] dt-bindings: clock: renesas: Add audio clock inputs for RZ/V2H family John Madieu
2026-04-15 20:32 ` Rob Herring (Arm)
2026-04-02 9:05 ` [PATCH v2 02/24] clk: renesas: r9a09g047: Add audio clock and reset support John Madieu
2026-04-08 9:38 ` Geert Uytterhoeven
2026-04-09 16:12 ` John Madieu
2026-04-02 9:05 ` [PATCH v2 03/24] irqchip/renesas-rzv2h: Add DMA ACK signal routing support John Madieu
2026-04-02 9:05 ` [PATCH v2 04/24] dma: sh: rz-dmac: " John Madieu
2026-04-02 9:05 ` [PATCH v2 05/24] ASoC: dt-bindings: renesas,rsnd: Split into generic and SoC-specific parts John Madieu
2026-04-15 20:51 ` Rob Herring
2026-04-02 9:05 ` [PATCH v2 06/24] ASoC: dt-bindings: Add RZ/G3E (R9A09G047) sound binding John Madieu
2026-04-15 20:57 ` Rob Herring
2026-04-23 8:42 ` John Madieu
2026-04-02 9:05 ` [PATCH v2 07/24] ASoC: rsnd: Add reset controller support to rsnd_mod John Madieu
2026-04-02 9:05 ` [PATCH v2 08/24] ASoC: rsnd: Add RZ/G3E SoC probing and register map John Madieu
2026-04-02 9:05 ` [PATCH v2 09/24] ASoC: rsnd: Add audmacpp clock and reset support for RZ/G3E John Madieu
2026-04-02 9:05 ` [PATCH v2 10/24] ASoC: rsnd: Add RZ/G3E DMA address calculation support John Madieu
2026-04-02 9:05 ` [PATCH v2 11/24] ASoC: rsnd: ssui: Add RZ/G3E SSIU BUSIF support John Madieu
2026-04-02 9:05 ` [PATCH v2 12/24] ASoC: rsnd: Add SSI reset support for RZ/G3E platforms John Madieu
2026-04-02 9:05 ` [PATCH v2 13/24] ASoC: rsnd: Add ADG reset support for RZ/G3E John Madieu
2026-04-02 9:05 ` [PATCH v2 14/24] ASoC: rsnd: adg: Add per-SSI ADG and SSIF supply clock management John Madieu
2026-04-02 9:05 ` [PATCH v2 15/24] ASoC: rsnd: src: Add SRC reset and clock support for RZ/G3E John Madieu
2026-04-02 9:05 ` [PATCH v2 16/24] ASoC: rsnd: Add rsnd_adg_mod_get() for PM support John Madieu
2026-04-02 9:05 ` [PATCH v2 17/24] ASoC: rsnd: Export rsnd_ssiu_mod_get() " John Madieu
2026-04-02 9:05 ` [PATCH v2 18/24] ASoC: rsnd: Add system suspend/resume support John Madieu
2026-04-02 9:05 ` John Madieu [this message]
2026-04-02 9:05 ` [PATCH v2 20/24] arm64: dts: renesas: r9a09g047: Add R-Car Sound support John Madieu
2026-04-02 9:12 ` Biju Das
2026-04-02 9:05 ` [PATCH v2 21/24] arm64: dts: renesas: rzg3e-smarc-som: Add Versa3 clock generator John Madieu
2026-04-02 9:05 ` [PATCH v2 22/24] arm64: dts: renesas: rzg3e-smarc-som: Add I2C1 support John Madieu
2026-04-02 9:05 ` [PATCH v2 23/24] arm64: dts: renesas: rzg3e-smarc-som: add audio pinmux definitions John Madieu
2026-04-02 9:05 ` [PATCH v2 24/24] arm64: dts: renesas: r9a09g047e57-smarc: add DA7212 audio codec support John Madieu
2026-04-08 9:41 ` Geert Uytterhoeven
2026-04-09 16:14 ` John Madieu
2026-04-02 11:55 ` [PATCH v2 00/24] ASoC: rsnd: Add audio support for the Renesas RZ/G3E SoC Mark Brown
2026-04-02 15:30 ` John Madieu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260402090524.9137-20-john.madieu.xa@bp.renesas.com \
--to=john.madieu.xa@bp.renesas.com \
--cc=Frank.Li@kernel.org \
--cc=biju.das.jz@bp.renesas.com \
--cc=broonie@kernel.org \
--cc=claudiu.beznea@tuxon.dev \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dmaengine@vger.kernel.org \
--cc=fabrizio.castro.jz@renesas.com \
--cc=geert+renesas@glider.be \
--cc=john.madieu@gmail.com \
--cc=krzk+dt@kernel.org \
--cc=kuninori.morimoto.gx@renesas.com \
--cc=lgirdwood@gmail.com \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=linux-sound@vger.kernel.org \
--cc=magnus.damm@gmail.com \
--cc=mturquette@baylibre.com \
--cc=p.zabel@pengutronix.de \
--cc=perex@perex.cz \
--cc=prabhakar.mahadev-lad.rj@bp.renesas.com \
--cc=robh@kernel.org \
--cc=sboyd@kernel.org \
--cc=tglx@kernel.org \
--cc=tiwai@suse.com \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox