[PATCH v1 08/13] dt-bindings: reset: Add StarFive JHB100 reset generator

Changhuang Liang
2026-04-03T05:50:16Z

Add bindings for thr reset generator which locates in pcierp syscon.

Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
---
.../reset/starfive,jhb100-reset-pcierp.yaml | 38 +++++++++++++++++++
.../dt-bindings/reset/starfive,jhb100-crg.h | 3 ++
2 files changed, 41 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/starfive,jhb100-reset-pcierp.yaml

diff --git a/Documentation/devicetree/bindings/reset/starfive,jhb100-reset-pcierp.yaml b/Documentation/devicetree/bindings/reset/starfive,jhb100-reset-pcierp.yaml
new file mode 100644
index 000000000000..fc6b0d1e64f4
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/starfive,jhb100-reset-pcierp.yaml
@@ -0,0 +1,38 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/starfive,jhb100-reset-pcierp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JHB100 SoC PCIe root port Reset Controller
+
+maintainers:
+ - Changhuang Liang <changhuang.liang@starfivetech.com>
+
+properties:
+ compatible:
+ enum:
+ - starfive,jhb100-reset-pcierp
+
+ reg:
+ maxItems: 1
+
+ "#reset-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - "#reset-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ reset-controller@14c {
+ compatible = "starfive,jhb100-reset-pcierp";
+ reg = <0x14c 0x4>;
+ #reset-cells = <1>;
+ };
+
+...
diff --git a/include/dt-bindings/reset/starfive,jhb100-crg.h b/include/dt-bindings/reset/starfive,jhb100-crg.h
index 4b15e348e92f..49326b7f486f 100644
--- a/include/dt-bindings/reset/starfive,jhb100-crg.h
+++ b/include/dt-bindings/reset/starfive,jhb100-crg.h
@@ -190,4 +190,7 @@
#define JHB100_PER3RST_MAIN_RSTN_PERIPH3_SENSORS 5
#define JHB100_PER3RST_IOMUX_PRESETN 6

+/* PCIERP SYSCON resets */
+#define JHB100_PCIERP_SYSCONRST_PE2RST_OUT 0
+
#endif /* __DT_BINDINGS_RESET_STARFIVE_JHB100_CRG_H__ */
--
2.25.1