From: Conor Dooley <conor@kernel.org>
To: Changhuang Liang <changhuang.liang@starfivetech.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Stephen Boyd <sboyd@kernel.org>, Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Philipp Zabel <p.zabel@pengutronix.de>,
Emil Renner Berthing <kernel@esmil.dk>,
Chen Wang <unicorn_wang@outlook.com>,
Inochi Amaoto <inochiama@gmail.com>,
Alexey Charkov <alchark@gmail.com>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Keguang Zhang <keguang.zhang@gmail.com>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
Ley Foon Tan <leyfoon.tan@starfivetech.com>
Subject: Re: [PATCH v1 12/13] soc: starfive: Add socinfo driver for JHB100 SoC
Date: Tue, 7 Apr 2026 16:47:02 +0100 [thread overview]
Message-ID: <20260407-captivity-psychic-d2ee5c9109d1@spud> (raw)
In-Reply-To: <20260403054945.467700-13-changhuang.liang@starfivetech.com>
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On Thu, Apr 02, 2026 at 10:49:44PM -0700, Changhuang Liang wrote:
> Add socinfo driver for JHB100 SoC. Currently available for distinguishing
> between the two reversions, A0 and A1.
Maybe a silly question, but do we need this? Are both revisions
available outside of Starfive?
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next prev parent reply other threads:[~2026-04-07 15:47 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-03 5:49 [PATCH v1 00/13] Add StarFive JHB100 syscon modules Changhuang Liang
2026-04-03 5:49 ` [PATCH v1 01/13] dt-bindings: soc: starfive: " Changhuang Liang
2026-04-05 7:17 ` Krzysztof Kozlowski
2026-04-07 7:34 ` Changhuang Liang
2026-04-07 7:37 ` Krzysztof Kozlowski
2026-04-03 5:49 ` [PATCH v1 02/13] dt-bindings: clock: Add system-0 domain PLL clock Changhuang Liang
2026-04-05 7:18 ` Krzysztof Kozlowski
2026-04-07 6:56 ` Changhuang Liang
2026-04-07 7:02 ` Krzysztof Kozlowski
2026-04-03 5:49 ` [PATCH v1 03/13] clk: starfive: Add system-0 domain PLL clock driver Changhuang Liang
2026-04-03 16:10 ` Brian Masney
2026-04-07 1:17 ` Changhuang Liang
2026-04-03 5:49 ` [PATCH v1 04/13] dt-bindings: clock: Add peripheral-0 domain PLL clock Changhuang Liang
2026-04-03 5:49 ` [PATCH v1 05/13] clk: starfive: Add peripheral-0 domain PLL clock driver Changhuang Liang
2026-04-03 5:49 ` [PATCH v1 06/13] dt-bindings: clock: Add peripheral-1 domain PLL clock Changhuang Liang
2026-04-03 5:49 ` [PATCH v1 07/13] clk: starfive: Add Peripheral-1 domain PLL clock driver Changhuang Liang
2026-04-03 5:49 ` [PATCH v1 08/13] dt-bindings: reset: Add StarFive JHB100 reset generator Changhuang Liang
2026-04-03 5:49 ` [PATCH v1 09/13] reset: starfive: Introduce assert_polarity Changhuang Liang
2026-04-03 5:49 ` [PATCH v1 10/13] reset: starfive: Add syscon reset driver support Changhuang Liang
2026-04-03 5:49 ` [PATCH v1 11/13] dt-bindings: hwinfo: Add starfive,jhb100-socinfo Changhuang Liang
2026-04-05 7:19 ` Krzysztof Kozlowski
2026-04-07 6:49 ` Changhuang Liang
2026-04-07 7:06 ` Krzysztof Kozlowski
2026-04-03 5:49 ` [PATCH v1 12/13] soc: starfive: Add socinfo driver for JHB100 SoC Changhuang Liang
2026-04-07 15:43 ` Conor Dooley
2026-04-07 15:47 ` Conor Dooley [this message]
2026-04-03 5:49 ` [PATCH v1 13/13] riscv: dts: starfive: jhb100: Add syscon nodes Changhuang Liang
2026-04-05 7:18 ` [PATCH v1 00/13] Add StarFive JHB100 syscon modules Krzysztof Kozlowski
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