From: Francisco Munoz Ruiz <francisco.ruiz@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor@kernel.org>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Rob Herring <robh@kernel.org>, Kees Cook <kees@kernel.org>,
"Gustavo A. R. Silva" <gustavoars@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org,
Francisco Munoz Ruiz <francisco.ruiz@oss.qualcomm.com>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: [PATCH v2 1/3] dt-bindings: cache: qcom,llcc: Document Hawi SoC
Date: Tue, 07 Apr 2026 14:51:47 -0700 [thread overview]
Message-ID: <20260407-external_llcc_changes2set-v2-1-b5017ce2020b@oss.qualcomm.com> (raw)
In-Reply-To: <20260407-external_llcc_changes2set-v2-0-b5017ce2020b@oss.qualcomm.com>
Add documentation for the Last Level Cache Controller (LLCC) bindings
to support Hawi SoC where the System Cache Table (SCT) is programmed
by firmware outside of Linux.
Introduce a property that specifies the base address of the shared
memory region from which the driver should read SCT descriptors
provided by firmware.
Signed-off-by: Francisco Munoz Ruiz <francisco.ruiz@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
.../devicetree/bindings/cache/qcom,llcc.yaml | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
index 995d57815781..40b737ad2230 100644
--- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
+++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
@@ -21,6 +21,7 @@ properties:
compatible:
enum:
- qcom,glymur-llcc
+ - qcom,hawi-llcc
- qcom,ipq5424-llcc
- qcom,kaanapali-llcc
- qcom,qcs615-llcc
@@ -57,6 +58,11 @@ properties:
interrupts:
maxItems: 1
+ memory-region:
+ maxItems: 1
+ description: handle to a reserved-memory node used for firmware-populated
+ SLC/SCT shared memory.
+
nvmem-cells:
items:
- description: Reference to an nvmem node for multi channel DDR
@@ -318,6 +324,7 @@ allOf:
contains:
enum:
- qcom,kaanapali-llcc
+ - qcom,hawi-llcc
- qcom,sm8450-llcc
- qcom,sm8550-llcc
- qcom,sm8650-llcc
@@ -340,6 +347,18 @@ allOf:
- const: llcc3_base
- const: llcc_broadcast_base
- const: llcc_broadcast_and_base
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,hawi-llcc
+ then:
+ required:
+ - memory-region
+ else:
+ properties:
+ memory-region: false
additionalProperties: false
--
2.34.1
next prev parent reply other threads:[~2026-04-07 21:52 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-07 21:51 [PATCH v2 0/3] Retrieve System Cache Table (SCT) descriptors from a shared memory region Francisco Munoz Ruiz
2026-04-07 21:51 ` Francisco Munoz Ruiz [this message]
2026-04-07 21:51 ` [PATCH v2 2/3] soc: qcom: llcc-qcom: get SCT descriptors from fw-populated memory Francisco Munoz Ruiz
2026-04-07 21:51 ` [PATCH v2 3/3] soc: qcom: llcc-qcom: Capitalize LLCC/EDAC in comments and diagnostics Francisco Munoz Ruiz
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