From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8C87F202C29; Wed, 8 Apr 2026 02:55:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.75.126.72 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775616942; cv=none; b=RBqpU3OgRMoDEkrptCtREKUrNHUMq13k5DZdqJtVSkFPGvJmbpMmFuUuZxVWxztio35CfuIjW5D7Lhu65IGbXoHke30xbWKiQ4m+BXNYOiVFWtq04HNqP1xKQv1SVsJ+65S2DmOyejDCXLg3JmhE10fpH8knPRraOsqDCc98c3Q= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775616942; c=relaxed/simple; bh=qwaFlGkP6/RsX6kelxwLonZ4sICUED9M2kUULVpOFao=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=OLt+ipCT1+K6uyCAyLJyl+U0war47QA8L7BGSYwOPBRUf4EgOTLeiV92cvywgTnWLxjACQ08jLko5qbg2BvxFd3T++XhJxj8/AA8LykbSsz56Ttut5UA27V0QE6J/06ySvutPGz7gvMoQdUnCNkar0AQLqifrcaPwI2PRE+7/nM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realtek.com; spf=pass smtp.mailfrom=realtek.com; dkim=pass (2048-bit key) header.d=realtek.com header.i=@realtek.com header.b=v+4YAQTY; arc=none smtp.client-ip=211.75.126.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realtek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=realtek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=realtek.com header.i=@realtek.com header.b="v+4YAQTY" X-SpamFilter-By: ArmorX SpamTrap 5.80 with qID 6382qkMO32349162, This message is accepted by code: ctloc85258 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=realtek.com; s=dkim; t=1775616766; bh=ByB2NCua2AOa2e3a09GFIdMk1eZywRgOzjPJhvZ9QNs=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Transfer-Encoding:Content-Type; b=v+4YAQTYBAURaio4X7Q7zo2+siRblosQymR+PWUvjObRP1gy7djJEpYpO1lJmbzGU jntPL+WDOOWtGsqegVjv9JrK9M0KN7KCFdzTmKK+bOSWx7u7b5YeaBWQlD2XYIonZT 3GohHh207EJPKkUBGVC7hqEbeoXZ27nVcFijtDTYPQ8YCHSixKk8ibQ9RRhv14d08H 7V2PDqyD1tf097m1dhv3nSX58q7pbNbhka4zd2oESgy4y3j2Jk3F42z4GTO4NHyakd rHTAog9FW+snfPK3mZAF0M4LNKpsKvFgaN8QWiI8Zw82WkdIEl3HUKPUTjNFCJ3j4D LtoCFzwzHXmnw== Received: from mail.realtek.com (rtkexhmbs03.realtek.com.tw[10.21.1.53]) by rtits2.realtek.com.tw (8.15.2/3.26/5.94) with ESMTPS id 6382qkMO32349162 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 8 Apr 2026 10:52:46 +0800 Received: from RTKEXHMBS05.realtek.com.tw (10.21.1.55) by RTKEXHMBS03.realtek.com.tw (10.21.1.53) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 8 Apr 2026 10:52:47 +0800 Received: from RTKEXHMBS05.realtek.com.tw (10.21.1.55) by RTKEXHMBS05.realtek.com.tw (10.21.1.55) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 8 Apr 2026 10:52:46 +0800 Received: from cn1dhc-k02 (172.21.252.101) by RTKEXHMBS05.realtek.com.tw (10.21.1.55) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 8 Apr 2026 10:52:46 +0800 From: Yu-Chun Lin To: , , , , , , CC: , , , , , , , , Subject: [PATCH v2 4/4] arm64: dts: realtek: Add GPIO support for RTD1625 Date: Wed, 8 Apr 2026 10:52:43 +0800 Message-ID: <20260408025243.1155482-5-eleanor.lin@realtek.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260408025243.1155482-1-eleanor.lin@realtek.com> References: <20260408025243.1155482-1-eleanor.lin@realtek.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Add the GPIO node for the Realtek RTD1625 SoC. Signed-off-by: Yu-Chun Lin --- Changes in v2: - Merge two reg memory regions. - Remove redundant status setting. --- arch/arm64/boot/dts/realtek/kent.dtsi | 39 +++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm64/boot/dts/realtek/kent.dtsi b/arch/arm64/boot/dts/realtek/kent.dtsi index 8d4293cd4c03..dafe56ce7d71 100644 --- a/arch/arm64/boot/dts/realtek/kent.dtsi +++ b/arch/arm64/boot/dts/realtek/kent.dtsi @@ -151,6 +151,37 @@ uart0: serial@7800 { status = "disabled"; }; + gpio: gpio@31000 { + compatible = "realtek,rtd1625-iso-gpio"; + reg = <0x31000 0x398>; + gpio-controller; + gpio-ranges = <&isom_pinctrl 0 0 2>, + <&ve4_pinctrl 2 0 6>, + <&iso_pinctrl 8 0 4>, + <&ve4_pinctrl 12 6 2>, + <&main2_pinctrl 14 0 2>, + <&ve4_pinctrl 16 8 4>, + <&main2_pinctrl 20 2 3>, + <&ve4_pinctrl 23 12 3>, + <&iso_pinctrl 26 4 2>, + <&isom_pinctrl 28 2 2>, + <&ve4_pinctrl 30 15 6>, + <&main2_pinctrl 36 5 6>, + <&ve4_pinctrl 42 21 3>, + <&iso_pinctrl 45 6 6>, + <&ve4_pinctrl 51 24 1>, + <&iso_pinctrl 52 12 1>, + <&ve4_pinctrl 53 25 11>, + <&main2_pinctrl 64 11 28>, + <&ve4_pinctrl 92 36 2>, + <&iso_pinctrl 94 13 19>, + <&iso_pinctrl 128 32 4>, + <&ve4_pinctrl 132 38 13>, + <&iso_pinctrl 145 36 19>, + <&ve4_pinctrl 164 51 2>; + #gpio-cells = <2>; + }; + iso_pinctrl: pinctrl@4e000 { compatible = "realtek,rtd1625-iso-pinctrl"; reg = <0x4e000 0x1a4>; @@ -161,6 +192,14 @@ main2_pinctrl: pinctrl@4f200 { reg = <0x4f200 0x50>; }; + iso_m_gpio: gpio@89100 { + compatible = "realtek,rtd1625-isom-gpio"; + reg = <0x89100 0x30>; + gpio-controller; + gpio-ranges = <&isom_pinctrl 0 0 4>; + #gpio-cells = <2>; + }; + isom_pinctrl: pinctrl@146200 { compatible = "realtek,rtd1625-isom-pinctrl"; reg = <0x146200 0x34>; -- 2.34.1