[PATCH] arm64: dts: qcom: ipq5210: add the bootph-all property

[Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>]

Add the bootph-all property to the nodes which are utilized by the
bootloaders.

Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/ipq5210-rdp504.dts |  5 +++++
 arch/arm64/boot/dts/qcom/ipq5210.dtsi       | 10 ++++++++++
 2 files changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq5210-rdp504.dts b/arch/arm64/boot/dts/qcom/ipq5210-rdp504.dts
index 941f866ecfe9..56dbc506da78 100644
--- a/arch/arm64/boot/dts/qcom/ipq5210-rdp504.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5210-rdp504.dts
@@ -17,6 +17,7 @@ aliases {
 
 	chosen {
 		stdout-path = "serial0";
+		bootph-all;
 	};
 };
 
@@ -41,6 +42,7 @@ qup_uart1_default_state: qup-uart1-default-state {
 		function = "qup_se1";
 		drive-strength = <6>;
 		bias-pull-down;
+		bootph-all;
 	};
 
 	sdhc_default_state: sdhc-default-state {
@@ -49,6 +51,7 @@ clk-pins {
 			function = "sdc_clk";
 			drive-strength = <8>;
 			bias-disable;
+			bootph-all;
 		};
 
 		cmd-pins {
@@ -56,6 +59,7 @@ cmd-pins {
 			function = "sdc_cmd";
 			drive-strength = <8>;
 			bias-pull-up;
+			bootph-all;
 		};
 
 		data-pins {
@@ -63,6 +67,7 @@ data-pins {
 			function = "sdc_data";
 			drive-strength = <8>;
 			bias-pull-up;
+			bootph-all;
 		};
 	};
 };
diff --git a/arch/arm64/boot/dts/qcom/ipq5210.dtsi b/arch/arm64/boot/dts/qcom/ipq5210.dtsi
index 3761eb03ab24..e0a90b16b097 100644
--- a/arch/arm64/boot/dts/qcom/ipq5210.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5210.dtsi
@@ -14,11 +14,13 @@ / {
 
 	clocks {
 		sleep_clk: sleep-clk {
+			bootph-all;
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
 		};
 
 		xo_board: xo-board-clk {
+			bootph-all;
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
 		};
@@ -98,6 +100,7 @@ reserved-memory {
 		#address-cells = <2>;
 		#size-cells = <2>;
 		ranges;
+		bootph-all;
 
 		bootloader@87800000 {
 			reg = <0x0 0x87800000 0x0 0x400000>;
@@ -108,6 +111,7 @@ smem@87c00000 {
 			compatible = "qcom,smem";
 			reg = <0x0 0x87c00000 0x0 0x40000>;
 			no-map;
+			bootph-all;
 
 			hwlocks = <&tcsr_mutex 3>;
 		};
@@ -129,6 +133,7 @@ soc@0 {
 		#size-cells = <2>;
 		dma-ranges = <0 0 0 0 0x10 0>;
 		ranges = <0 0 0 0 0x10 0>;
+		bootph-all;
 
 		tlmm: pinctrl@1000000 {
 			compatible = "qcom,ipq5210-tlmm";
@@ -139,6 +144,7 @@ tlmm: pinctrl@1000000 {
 			gpio-ranges = <&tlmm 0 0 54>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
+			bootph-all;
 		};
 
 		gcc: clock-controller@1800000 {
@@ -152,6 +158,7 @@ gcc: clock-controller@1800000 {
 				 <0>;
 			#clock-cells = <1>;
 			#reset-cells = <1>;
+			bootph-all;
 		};
 
 		tcsr_mutex: hwlock@1905000 {
@@ -169,6 +176,7 @@ qupv3: geniqup@1ac0000 {
 			ranges;
 			#address-cells = <2>;
 			#size-cells = <2>;
+			bootph-all;
 
 			uart1: serial@1a84000 {
 				compatible = "qcom,geni-debug-uart";
@@ -176,6 +184,7 @@ uart1: serial@1a84000 {
 				clocks = <&gcc GCC_QUPV3_WRAP_SE1_CLK>;
 				clock-names = "se";
 				interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+				bootph-all;
 
 				status = "disabled";
 			};
@@ -200,6 +209,7 @@ sdhc: mmc@7804000 {
 				      "core",
 				      "xo";
 			non-removable;
+			bootph-all;
 
 			status = "disabled";
 		};

---
base-commit: db7efce4ae23ad5e42f5f55428f529ff62b86fab
change-id: 20260409-add_bootph-0c68315784c5

Best regards,
--  
Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>