From: Paolo Abeni <pabeni@redhat.com>
To: luca.weiss@fairphone.com
Cc: pabeni@redhat.com, krzk+dt@kernel.org, akoskovich@pm.me,
konradybcio@kernel.org, linux-kernel@vger.kernel.org,
conor+dt@kernel.org, devicetree@vger.kernel.org,
andersson@kernel.org, netdev@vger.kernel.org, kuba@kernel.org,
linux-arm-msm@vger.kernel.org, andrew+netdev@lunn.ch,
davem@davemloft.net, robh@kernel.org, edumazet@google.com,
~postmarketos/upstreaming@lists.sr.ht,
phone-devel@vger.kernel.org, elder@kernel.org
Subject: Re: [5/6] arm64: dts: qcom: milos: Add IPA node
Date: Thu, 9 Apr 2026 09:58:54 +0200 [thread overview]
Message-ID: <20260409075854.308955-1-pabeni@redhat.com> (raw)
In-Reply-To: <20260403-milos-ipa-v1-5-01e9e4e03d3e@fairphone.com>
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---
arm64: dts: qcom: milos: Add IPA node
Add the description of the IPA block in the Milos SoC.
> diff --git a/arch/arm64/boot/dts/qcom/milos.dtsi b/arch/arm64/boot/dts/qcom/milos.dtsi
> index e1a51d43943f..a244e136a877 100644
> --- a/arch/arm64/boot/dts/qcom/milos.dtsi
> +++ b/arch/arm64/boot/dts/qcom/milos.dtsi
> @@ -1281,6 +1281,50 @@ adreno_smmu: iommu@3da0000 {
> dma-coherent;
> };
>
> + ipa: ipa@3f40000 {
> + compatible = "qcom,milos-ipa";
> +
> + reg = <0x0 0x03f40000 0x0 0x10000>,
> + <0x0 0x03f50000 0x0 0x5000>,
> + <0x0 0x03e04000 0x0 0xfc000>;
> + reg-names = "ipa-reg",
> + "ipa-shared",
> + "gsi";
> +
> + interrupts-extended = <&intc GIC_SPI 654 IRQ_TYPE_EDGE_RISING 0>,
> + <&intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH 0>,
> + <&smp2p_ipa_in 0 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_ipa_in 1 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "ipa",
> + "gsi",
> + "ipa-clock-query",
> + "ipa-setup-ready";
> +
> + clocks = <&rpmhcc RPMH_IPA_CLK>;
> + clock-names = "core";
> +
> + interconnects = <&aggre2_noc MASTER_IPA QCOM_ICC_TAG_ALWAYS
> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
> + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
> + &cnoc_main SLAVE_IPA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>;
> + interconnect-names = "memory",
> + "config";
> +
> + iommus = <&apps_smmu 0x4a0 0x0>,
> + <&apps_smmu 0x4a2 0x0>;
> +
> + qcom,qmp = <&aoss_qmp>;
> +
> + qcom,smem-states = <&smp2p_ipa_out 0>,
> + <&smp2p_ipa_out 1>;
> + qcom,smem-state-names = "ipa-clock-enabled-valid",
> + "ipa-clock-enabled";
> +
> + sram = <&ipa_modem_tables>;
> ^^^^^^^^^^^^^^^^^^
Is the ipa_modem_tables label defined anywhere? The Device Tree Compiler
will fail with "Reference to non-existent node or label
'ipa_modem_tables'" if this label doesn't exist.
The sram property is optional according to the qcom,ipa.yaml binding, and
other similar Qualcomm SoCs like SM8350, SM8550, and SM8650 don't include
this property in their IPA nodes. Should this line be removed, or does the
ipa_modem_tables node need to be added to the reserved-memory section?
> +
> + status = "disabled";
> + };
> +
[ ... ]
next prev parent reply other threads:[~2026-04-09 7:59 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-03 16:43 [PATCH 0/6] IPA v5.2 support for Milos and Fairphone (Gen. 6) Luca Weiss
2026-04-03 16:43 ` [PATCH 1/6] net: ipa: fix GENERIC_CMD register field masks for IPA v5.0+ Luca Weiss
2026-04-08 16:34 ` Simon Horman
2026-04-03 16:43 ` [PATCH 2/6] net: ipa: fix event ring index not programmed " Luca Weiss
2026-04-08 16:35 ` Simon Horman
2026-04-03 16:43 ` [PATCH 3/6] dt-bindings: net: qcom,ipa: add Milos compatible Luca Weiss
2026-04-05 8:03 ` Krzysztof Kozlowski
2026-04-03 16:43 ` [PATCH 4/6] net: ipa: add IPA v5.2 configuration data Luca Weiss
2026-04-08 16:36 ` Simon Horman
2026-04-03 16:43 ` [PATCH 5/6] arm64: dts: qcom: milos: Add IPA node Luca Weiss
2026-04-03 19:27 ` Dmitry Baryshkov
2026-04-07 10:30 ` Konrad Dybcio
2026-04-09 7:58 ` Paolo Abeni [this message]
2026-04-09 8:00 ` [5/6] " Krzysztof Kozlowski
2026-04-03 16:43 ` [PATCH 6/6] arm64: dts: qcom: milos-fairphone-fp6: Enable IPA Luca Weiss
2026-04-03 19:27 ` Dmitry Baryshkov
2026-04-09 8:26 ` Luca Weiss
2026-04-09 7:46 ` [PATCH 0/6] IPA v5.2 support for Milos and Fairphone (Gen. 6) Paolo Abeni
2026-04-09 8:00 ` patchwork-bot+netdevbpf
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