Re: [PATCH 5/5] arm64: dts: qcom: qcs8550: add QCS8550 RB5Gen2 board support

Dmitry Baryshkov
2026-04-04T21:20:28Z

On Sat, Apr 04, 2026 at 10:50:58AM +0100, Joe Sandom via B4 Relay wrote:
> From: Joe Sandom <jsandom@axon.com>
>
> The RB5gen2 is an embedded development platform for the
> QCS8550, based on the Snapdragon 8 Gen 2 SoC (SM8550).
>
> This change implements the main board, the vision mezzanine
> will be supported in a follow up patch.
>
> The main board has the following features:
> - Qualcomm Dragonwing QCS8550 SoC
> - Adreno GPU 740
> - Spectra ISP
> - Adreno VPU 8550
> - Adreno DPU 1295
> - 1 x 1GbE Ethernet (USB Ethernet)
> - WIFI 7 + Bluetooth 5.4
> - 1 x USB 2.0 Micro B (Debug)
> - 1 x USB 3.0 Type C (ADB, DP out)
> - 2 x USB 3.0 Type A
> - 1 x HDMI 1.4 Type A
> - 1 x DP 1.4 Type C
> - 2 x WSA8845 Speaker amplifiers
> - 2 x Speaker connectors
> - 1 x On Board PDM MIC
> - Accelerometer + Gyro Sensor
> - 96Boards compatible low-speed and high-speed connectors [1]
> - 7 x LED indicators (4 user, 2 radio, 1 power)
> - Buttons for power, volume up/down, force USB boot
> - 3 x Dip switches
>
> On-Board PMICs:
> - PMK8550 2.1
> - PM8550 2.0
> - PM8550VS 2.0 x4
> - PM8550VE 2.0
> - PM8550B 2.0
> - PMR735D 2.0
> - PM8010 1.1 x2
>
> Product Page: [2]
>
> [1] https://www.96boards.org/specifications/
> [2] https://www.thundercomm.com/product/qualcomm-rb5-gen-2-development-kit
>
> Signed-off-by: Joe Sandom <jsandom@axon.com>
> ---
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> arch/arm64/boot/dts/qcom/qcs8550-rb5gen2.dts | 1610 ++++++++++++++++++++++++++
> 2 files changed, 1611 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index 4ba8e73064194926096b98b9556a3207e8f24d72..f8c65771f76629d7fafee15ac8d7bb62cd24a20f 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -184,6 +184,7 @@ qcs8300-ride-el2-dtbs := qcs8300-ride.dtb monaco-el2.dtbo
>
> dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride-el2.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += qcs8550-rb5gen2.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs8550-rb5gen2.dts b/arch/arm64/boot/dts/qcom/qcs8550-rb5gen2.dts
> new file mode 100644
> index 0000000000000000000000000000000000000000..280fbd3a09997e3e2613498e25ac188680484cc4
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/qcs8550-rb5gen2.dts
> @@ -0,0 +1,1610 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2026 Axon Enterprise, Inc.
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> +#include "qcs8550.dtsi"
> +#include "pm8010.dtsi"
> +#include "pm8550.dtsi"
> +#include "pm8550b.dtsi"
> +#define PMK8550VE_SID 5
> +#include "pm8550ve.dtsi"
> +#include "pm8550vs.dtsi"
> +#include "pmk8550.dtsi"
> +#include "pmr735d_a.dtsi"
> +#include "pmr735d_b.dtsi"
> +
> +/ {
> + model = "Qualcomm Technologies, Inc. QCS8550 RB5Gen2";
> + compatible = "qcom,qcs8550-rb5gen2", "qcom,qcs8550", "qcom,sm8550";
> + chassis-type = "embedded";
> +
> + aliases {
> + serial0 = &uart7;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + clocks {
> + clk40m: can-clk {
> + compatible = "fixed-clock";
> + clock-frequency = <40000000>;
> + #clock-cells = <0>;
> + };
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + pinctrl-0 = <&volume_up_n>;
> + pinctrl-names = "default";
> +
> + key-volume-up {
> + label = "Volume Up";
> + linux,code = <KEY_VOLUMEUP>;
> + gpios = <&pm8550_gpios 6 GPIO_ACTIVE_LOW>;
> + debounce-interval = <15>;
> + linux,can-disable;
> + wakeup-source;
> + };
> + };
> +
> + hdmi-connector {
> + compatible = "hdmi-connector";
> + type = "a";
> +
> + port {
> + hdmi_con: endpoint {
> + remote-endpoint = <&lt9611_out>;
> + };
> + };
> + };
> +
> + /* Lontium LT9611UXC fails FW upgrade and has timeouts with geni-i2c */
> + /* Workaround is to use bit-banged I2C */
> + i2c_hub_3_gpio: i2c {
> + compatible = "i2c-gpio";
> +
> + sda-gpios = <&tlmm 22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + scl-gpios = <&tlmm 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + led-0 {
> + label = "green:status-3";
> + function = LED_FUNCTION_STATUS;
> + color = <LED_COLOR_ID_GREEN>;
> + gpios = <&pm8550_gpios 2 GPIO_ACTIVE_HIGH>;
> + default-state = "off";
> + };
> +
> + led-1 {
> + label = "blue:bt-power";
> + function = LED_FUNCTION_BLUETOOTH;
> + color = <LED_COLOR_ID_BLUE>;
> + gpios = <&pm8550b_gpios 7 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "bluetooth-power";
> + default-state = "off";
> + };
> +
> + led-2 {
> + label = "yellow:wlan";
> + function = LED_FUNCTION_WLAN;
> + color = <LED_COLOR_ID_YELLOW>;
> + gpios = <&pm8550b_gpios 9 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "phy0tx";
> + default-state = "off";
> + };
> + };
> +
> + lt9611_1v2: lt9611-regulator-1v2 {
> + compatible = "regulator-fixed";
> + regulator-name = "LT9611_1V2";
> +
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> +
> + vin-supply = <&vreg_l14b_3p2>;
> + };
> +
> + lt9611_3v3: lt9611-regulator-3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "LT9611_3V3";
> +
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + vin-supply = <&vreg_l14b_3p2>;
> + };
> +
> + pmic-glink {
> + compatible = "qcom,sm8550-pmic-glink", "qcom,pmic-glink";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + connector@0 {
> + compatible = "usb-c-connector";
> + reg = <0>;
> + power-role = "dual";
> + data-role = "dual";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + pmic_glink_hs_in: endpoint {
> + remote-endpoint = <&usb_1_dwc3_hs>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + pmic_glink_ss_in: endpoint {
> + remote-endpoint = <&redriver_usb_con_ss>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> +
> + pmic_glink_sbu_in: endpoint {
> + remote-endpoint = <&redriver_usb_con_sbu>;
> + };
> + };
> + };
> + };
> + };
> +
> + pcie_upd_1p05: regulator-pcie-upd-1p05 {
> + compatible = "regulator-fixed";
> + regulator-name = "PCIE_UPD_1P05";
> + gpio = <&tlmm 179 GPIO_ACTIVE_HIGH>;
> + vin-supply = <&vdd_ntn_0p9>;
> + regulator-min-microvolt = <1050000>;
> + regulator-max-microvolt = <1050000>;
> + enable-active-high;
> + regulator-enable-ramp-delay = <5000>;
> + pinctrl-0 = <&upd_1p05_en>;
> + pinctrl-names = "default";
> + };
> +
> + pcie_upd_3p3: regulator-pcie-upd-3p3 {
> + compatible = "regulator-fixed";
> + regulator-name = "PCIE_UPD_3P3";
> + gpio = <&tlmm 13 GPIO_ACTIVE_HIGH>;
> + vin-supply = <&pcie_upd_1p05>;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + enable-active-high;
> + regulator-enable-ramp-delay = <10000>;
> + pinctrl-0 = <&upd_3p3_en>;
> + pinctrl-names = "default";
> + };
> +
> + upd_reset: regulator-upd-reset {
> + compatible = "regulator-fixed";
> + regulator-name = "UPD_RESET";

Reset usually isn't a regulator.

> + gpio = <&tlmm 182 GPIO_ACTIVE_HIGH>;
> + vin-supply = <&pcie_upd_3p3>;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + enable-active-high;
> + regulator-enable-ramp-delay = <10000>;
> + regulator-boot-on;
> + regulator-always-on;

Especially since it's not controlled.

> + pinctrl-0 = <&upd_ponrst>;
> + pinctrl-names = "default";
> + };
> +
> + usbhub_reset: regulator-usbhub-reset {
> + compatible = "regulator-fixed";
> + regulator-name = "USBHUB_RESET";

Same here.

> + gpio = <&tlmm 41 GPIO_ACTIVE_LOW>;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + startup-delay-us = <1500>;
> + off-on-delay-us = <1500>;
> + pinctrl-0 = <&usbhub_rst>;
> + pinctrl-names = "default";
> + };
> +
> + vdd_ntn_0p9: regulator-vdd-ntn-0p9 {
> + compatible = "regulator-fixed";
> + regulator-name = "VDD_NTN_0P9";
> + vin-supply = <&vdd_ntn_1p8>;
> + regulator-min-microvolt = <899400>;
> + regulator-max-microvolt = <899400>;
> + regulator-enable-ramp-delay = <4300>;
> + };
> +
> + vdd_ntn_1p8: regulator-vdd-ntn-1p8 {
> + compatible = "regulator-fixed";
> + regulator-name = "VDD_NTN_1P8";
> + gpio = <&tlmm 67 GPIO_ACTIVE_HIGH>;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + enable-active-high;
> + pinctrl-0 = <&ntn0_en>;
> + pinctrl-names = "default";
> + regulator-enable-ramp-delay = <10000>;
> + };
> +
> + vdd_ntn1_0p9: regulator-vdd-ntn1-0p9 {
> + compatible = "regulator-fixed";
> + regulator-name = "VDD_NTN1_0P9";
> + vin-supply = <&vdd_ntn1_1p8>;
> + regulator-min-microvolt = <899400>;
> + regulator-max-microvolt = <899400>;
> + regulator-enable-ramp-delay = <4300>;
> + };
> +
> + vdd_ntn1_1p8: regulator-vdd-ntn1-1p8 {
> + compatible = "regulator-fixed";
> + regulator-name = "VDD_NTN1_1P8";
> + gpio = <&tlmm 42 GPIO_ACTIVE_HIGH>;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + enable-active-high;
> + pinctrl-0 = <&ntn1_en>;
> + pinctrl-names = "default";
> + regulator-enable-ramp-delay = <10000>;
> + };
> +
> + vph_pwr: regulator-vph-pwr {
> + compatible = "regulator-fixed";
> + regulator-name = "vph_pwr";
> + regulator-min-microvolt = <3700000>;
> + regulator-max-microvolt = <3700000>;
> +
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + sound {
> + compatible = "qcom,sm8550-sndcard", "qcom,sm8450-sndcard";
> + model = "QCS8550-RB5Gen2";
> + audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",
> + "SpkrRight IN", "WSA_SPK2 OUT",
> + "VA DMIC0", "vdd-micb",
> + "VA DMIC1", "vdd-micb";
> +
> + wsa-dai-link {
> + link-name = "WSA Playback";
> +
> + cpu {
> + sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
> + };
> +
> + codec {
> + sound-dai = <&left_spkr>, <&right_spkr>,
> + <&swr0 0>, <&lpass_wsamacro 0>;
> + };
> +
> + platform {
> + sound-dai = <&q6apm>;
> + };
> + };
> +
> + va-dai-link {
> + link-name = "VA Capture";
> +
> + cpu {
> + sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>;
> + };
> +
> + codec {
> + sound-dai = <&lpass_vamacro 0>;
> + };
> +
> + platform {
> + sound-dai = <&q6apm>;
> + };
> + };
> + };
> +
> + wcn7850-pmu {
> + compatible = "qcom,wcn7850-pmu";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&wlan_en>, <&bt_default>, <&pmk8550_sleep_clk>;

swctrl?

> +
> + wlan-enable-gpios = <&tlmm 80 GPIO_ACTIVE_HIGH>;
> + bt-enable-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;

swctrl?

> +
> + vdd-supply = <&vreg_s5g_0p85>;
> + vddio-supply = <&vreg_l15b_1p8>;
> + vddaon-supply = <&vreg_s2g_0p852>;
> + vdddig-supply = <&vreg_s4e_0p95>;
> + vddrfa1p2-supply = <&vreg_s4g_1p25>;
> + vddrfa1p8-supply = <&vreg_s6g_1p86>;

[...]

> +
> +&gpi_dma1 {
> + status = "okay";
> +};
> +
> +&gpi_dma2 {
> + status = "okay";
> +};
> +
> +&gpu {
> + status = "okay";
> +};
> +
> +&gpu_zap_shader {
> + firmware-name = "qcom/qcs8550/a740_zap.mbn";
> +};
> +
> +&i2c_hub_2 {
> + clock-frequency = <100000>;
> +
> + status = "okay";
> +
> + typec-mux@1c {
> + compatible = "onnn,nb7vpq904m";
> + reg = <0x1c>;
> +
> + vcc-supply = <&vreg_l15b_1p8>;
> +
> + retimer-switch;
> + orientation-switch;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + redriver_usb_con_ss: endpoint {
> + remote-endpoint = <&pmic_glink_ss_in>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + redriver_phy_con_ss: endpoint {
> + remote-endpoint = <&usb_dp_qmpphy_out>;
> + data-lanes = <0 1 2 3>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> +
> + redriver_usb_con_sbu: endpoint {
> + remote-endpoint = <&pmic_glink_sbu_in>;
> + };
> + };
> + };
> + };
> +};
> +
> +&i2c_hub_3_gpio {
> + clock-frequency = <400000>;
> +
> + status = "okay";
> +
> + lt9611_codec: hdmi-bridge@2b {
> + compatible = "lontium,lt9611uxc";
> + reg = <0x2b>;
> +
> + interrupts-extended = <&tlmm 40 IRQ_TYPE_EDGE_FALLING>;
> + reset-gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>;
> +
> + vdd-supply = <&lt9611_1v2>;
> + vcc-supply = <&lt9611_3v3>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&lt9611_irq_pin &lt9611_rst_pin>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + lt9611_a: endpoint {
> + remote-endpoint = <&mdss_dsi0_out>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> +
> + lt9611_out: endpoint {
> + remote-endpoint = <&hdmi_con>;
> + };
> + };
> + };
> + };
> +};
> +
> +&i2c_hub_4 {
> + status = "okay";
> +};
> +
> +&i2c_master_hub_0 {
> + status = "okay";
> +};
> +
> +&ipa {
> + qcom,gsi-loader = "self";
> + memory-region = <&ipa_fw_mem>;

These two should be a part of sm8550.dtsi

> + firmware-name = "qcom/qcs8550/ipa_fws.mbn";
> +
> + status = "okay";
> +};
> +
> +&iris {
> + status = "okay";
> +};
> +
> +&lpass_vamacro {
> + pinctrl-0 = <&dmic01_default>;
> + pinctrl-names = "default";
> +
> + qcom,dmic-sample-rate = <4800000>;
> +
> + vdd-micb-supply = <&vreg_l15b_1p8>;
> +};
> +
> +&mdss {
> + status = "okay";
> +};
> +
> +&mdss_dsi0 {
> + vdda-supply = <&vreg_l3e_1p2>;
> +
> + status = "okay";
> +};
> +
> +&mdss_dsi0_out {
> + remote-endpoint = <&lt9611_a>;
> + data-lanes = <0 1 2 3>;
> +};
> +
> +&mdss_dsi0_phy {
> + vdds-supply = <&vreg_l1e_0p88>;
> +
> + status = "okay";
> +};
> +
> +&mdss_dp0 {
> + status = "okay";
> +};
> +
> +&pcie0 {
> + wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
> + perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
> +
> + pinctrl-0 = <&pcie0_default_state>;
> + pinctrl-names = "default";
> +
> + iommu-map = <0x0 &apps_smmu 0x1400 0x1>,
> + <0x100 &apps_smmu 0x1401 0x1>,
> + <0x208 &apps_smmu 0x1402 0x1>,
> + <0x210 &apps_smmu 0x1403 0x1>,
> + <0x218 &apps_smmu 0x1404 0x1>,
> + <0x300 &apps_smmu 0x1407 0x1>,
> + <0x400 &apps_smmu 0x1408 0x1>,
> + <0x500 &apps_smmu 0x140c 0x1>,
> + <0x501 &apps_smmu 0x140e 0x1>;
> +
> + /delete-property/ msi-map;

Why?

> +
> + status = "okay";
> +};
> +
[...]
> +
> +&pcie1 {
> + wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
> + perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
> +
> + pinctrl-0 = <&pcie1_default_state>;
> + pinctrl-names = "default";
> +
> + iommu-map = <0x0 &apps_smmu 0x1480 0x1>,
> + <0x100 &apps_smmu 0x1481 0x1>,
> + <0x208 &apps_smmu 0x1482 0x1>,
> + <0x210 &apps_smmu 0x1483 0x1>,
> + <0x218 &apps_smmu 0x1484 0x1>,
> + <0x300 &apps_smmu 0x1487 0x1>,
> + <0x400 &apps_smmu 0x1488 0x1>,
> + <0x500 &apps_smmu 0x148c 0x1>,
> + <0x501 &apps_smmu 0x148e 0x1>;
> +
> + /delete-property/ msi-map;

Why?

> +
> + status = "okay";
> +};
> +
> +&pcie1_phy {
> + vdda-phy-supply = <&vreg_l3c_0p9>;
> + vdda-pll-supply = <&vreg_l3e_1p2>;
> + vdda-qref-supply = <&vreg_l1e_0p88>;
> +
> + status = "okay";
> +};
> +

[...]

> +
> +&remoteproc_adsp {
> + firmware-name = "qcom/qcs8550/adsp.mdt",
> + "qcom/qcs8550/adsp_dtb.mdt";

MBN, please align vertically on the quote mark. The same for CDSP and
modem.

> + status = "okay";
> +};
> +
> +&remoteproc_cdsp {
> + firmware-name = "qcom/qcs8550/cdsp.mdt",
> + "qcom/qcs8550/cdsp_dtb.mdt";
> + status = "okay";
> +};
> +
> +&remoteproc_mpss {
> + firmware-name = "qcom/qcs8550/modem.mdt",
> + "qcom/qcs8550/modem_dtb.mdt";
> + status = "okay";
> +};
> +

--
With best wishes
Dmitry