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Sun, 12 Apr 2026 23:57:48 -0700 From: Akhil R To: CC: , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v2 13/13] arm64: defconfig: Enable I3C and SPD5118 hwmon Date: Mon, 13 Apr 2026 12:27:46 +0530 Message-ID: <20260413065747.31834-1-akhilrajeev@nvidia.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099DE:EE_|CH3PR12MB7691:EE_ X-MS-Office365-Filtering-Correlation-Id: b5be24d7-9276-48e4-e76a-08de992a03bb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|82310400026|376014|1800799024|7416014|22082099003|56012099003|18002099003; X-Microsoft-Antispam-Message-Info: ZQjKTw9HTlQb5z2XaQqH1IBWWpR1VtJAy/8tpfAO+TC+ysEI0cW71RN4IF2vJHgqg38BRvtUbyaOFMj7PifIpxl7MyBqGhNrWWq5WMhfJ33itKrH1poEQaYLQOwFI+CMKTcrfGTaYuGGE21tmXwFt+6izHa4L93lj3q1N4I+TlVeWp0/OGCWvzxNZnZY8KO5iHISI+umXi2ZYM1Uat2OM6uschWzah5H91RqSHUlpmPASyb2age563Cw9YUHjwt1L8cbCJj0E/j438CpYhbm8xVvzbDwv0welXpHZqvmwDBcsclgu9yAPvrbAOkKb8V2dFdmddAnUUd88Yru7qIUL7atOZxdK8SDaUwWN5ItUntss0xV/IBJ8JItE2ntHNq0iYwlgRgWqye3/sLaKGQ+BvChDlhj4dAUDdphLrVHwnMWuJlzsw+LBoan4d2zz9vdPjOSadiJcVWs96Fw4hl0j5eqmu1yMYq2V/CQtsQmZHIAZedUAjpTZ875CaWLLLG0T5OfuTP9pG6VJ9wMvvMKixXiizSg2q5J2x48R/BXvzI1RF2yURHzfsR9xruSan2sXa7jppmkYKPdQLyNj2aNGkQKrKVSWtxNsKzLV1fomdXN80e/ln0aK4zp/ZH/jv//Sf9xKJcjhx4Jyo5Qsz23gDGMrLToxjx9HPVmbM/AgOjMO2vsc6aSKlqqFbBlAbwI/u6w3szH0w62KQrlAgLE+f8E23xDKv6W2qdhg69UQ4ZTkMLO9aI3tQjz/INA9ms2HvkOmGHr873ZWVpb6ZtNEA== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700016)(82310400026)(376014)(1800799024)(7416014)(22082099003)(56012099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 7fFm/0xKZWgjYAVZjbIvc/H2N7gna0e8taFZoQNRcXQSQu7GThrf/BdgEINCGlKBqLfTbRfWrvZqdhZFTUZ7cJtWU+3DwZaGNGEhwyjMSXOtDMJDi5Xq2degfQ3LOs8a/XjRaCGVJ5g0UKGpKrgkGyvQTce1e6D5Q3kiz/7h5Uxzen/mN9fSACvMtAeCneuOWFfWGufigLHNkkEbdI5w3c5FR/Y3ZRr6+zEb8S+tMAKxpZgqD6f0zf1eo6KJVr4oFbhOTrCUx58M1tYwP0Q17719e3t5xiskrZ969CiO9XayKVggfyrZxv5T0X14ZqEt5FGcEALs/QVlWqSEnjwqAehn0RzFAVIZJdLVpqJ6Hv8LSaUGfqaaEO7CYEScKvbWOF3lNyoTqsSRc/7XS0++BtO4hB/jtJSGT2ZWfZN55sZ1qcIQpbLq26FNgKw40rdu X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Apr 2026 06:58:06.2048 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b5be24d7-9276-48e4-e76a-08de992a03bb X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099DE.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB7691 On Sun, 12 Apr 2026 15:33:42 +0200, Krzysztof Kozlowski > On 12/04/2026 15:32, Krzysztof Kozlowski wrote: >> On 11/04/2026 09:20, Guenter Roeck wrote: >>> On 4/10/26 22:34, Akhil R wrote: >>> [ ... ] >>>>>>> And it >>>>>>> should bring me clear rule what I can or cannot remove from defconfig, >>>>>>> if in 2 years I come and start pruning it from symbols. >>>> >>>> I am still a little confused on what information would likely accept (and >>>> keep) these configs in the defconfig. Would updating the commit message >>>> as below work? >>>> >>>> "These configs enable the support for SPD5118 within the >>>> Small-Outline-Compression-Attached Memory Modules (SOCAMM) LPDDR5X found >>>> in the NVIDIA Vera CPUs. The Vera CPU uses ACPI and is part of platforms >>>> such as Vera Rubin." >>>> >>> >>> It is quite interesting that we argue about SPD5118 which is mandatory in >>> DDR5 systems. At the same time, CONFIG_IGB_HWMON, CONFIG_SENSORS_MACSMC_HWMON, >>> CONFIG_SENSORS_RASPBERRYPI_HWMON, and CONFIG_RTC_DRV_DS3232_HWMON _are_ >>> enabled in arm64:defconfig. CONFIG_IGB_HWMON is even built-in. >> >> Why CONFIG_SENSORS_MACSMC_HWMON is weird? It is part of the soc using >> the defconfig? >> >> The author here has troubles bringing any arguments why his drivers >> should be defconfig and keeps asking what do I want to hear. If one >> cannot make an argument why a change is needed, then maybe the change >> should not be sent? >> >> It's the job of the author to convince why the community needs this >> change, unless it is obvious, ofc. >> >>> >>> It is kind of difficult to understand why those are more important than >>> the temperature sensor on DDR5 modules (or the temperature sensor on DDR4 >>> modules, for that matter). >> >> No one discussed this. I have no clue what is SPD5118 and commit msg did >> not explain that. Did not even provide accurate user of that. >> >>> >>> I don't know what the policy for defconfig is, but just based on that it does >>> seem to lack consistency. >> >> No wonder... people write poor commits and send that to upstream. And >> when asked "why do we want this" they got stuck. >> >>> >>> A separate question is if it is time to enable I3C in default configurations. >>> I'd think so - more and more chip vendors support it, and presumably they would >>> not invest in it if there was no demand, but that is just my personal opinion. >> >> Isn't I3C needed for SPD5118. Otherwise I understand even less from this >> rationale - why I3C is being enabled here? >> >> And before author asks what do I want to here: no, it is author's job to >> convince me to accept I3C in defconfig. Not mine. > > BTW, all this was asked at v1 and author did not improve the commit msg > beside giving quite broad/unspecific "Vera". If I am not wrong, the ask in v1 was to specify the product which this is getting used - 'Vera' it is. I do not know why you would think it is unspecific. As Thierry and Guenter mentioned, the lack of policy and 'mix of both' in the defconfig makes it quite difficult to understand what could genuinely be convincing other than putting down every little detail or do a trial and error. Anyway, I will describe where each config is getting used in the next revision - hoping that would help. Regards, Akhil