[PATCH v6 12/21] drm: renesas: rz-du: mipi_dsi: Add out_port to OF data

Tommaso Merciai
2026-04-08T10:39:30Z

Add `out_port` field to the `rzg2l_mipi_dsi_hw_info` structure to store
the DSI output port index. RZ/G2L and RZ/V2H(P) use port 1 for DSI
output, while RZ/G3E uses port 2.

Update `rzg2l_mipi_dsi_host_attach()` and `rzg2l_mipi_dsi_probe()` to
use this `out_port` from the OF data, facilitating future support for
RZ/G3E SoC.

Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
---
v5->v6:
- No changes.

v4->v5:
- No changes.

v3->v4:
- No changes.

v2->v3:
- No changes.

v1->v2:
- No changes.

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
index 715872130780..be6dbf19a24e 100644
--- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
+++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
@@ -58,6 +58,7 @@ struct rzg2l_mipi_dsi_hw_info {
u32 link_reg_offset;
unsigned long min_dclk;
unsigned long max_dclk;
+ u8 out_port;
u8 features;
};

@@ -1158,7 +1159,7 @@ static int rzg2l_mipi_dsi_host_attach(struct mipi_dsi_host *host,
dsi->mode_flags = device->mode_flags;

dsi->next_bridge = devm_drm_of_get_bridge(dsi->dev, dsi->dev->of_node,
- 1, 0);
+ dsi->info->out_port, 0);
if (IS_ERR(dsi->next_bridge)) {
ret = PTR_ERR(dsi->next_bridge);
dev_err(dsi->dev, "failed to get next bridge: %d\n", ret);
@@ -1411,7 +1412,9 @@ static int rzg2l_mipi_dsi_probe(struct platform_device *pdev)

dsi->info = of_device_get_match_data(&pdev->dev);

- ret = drm_of_get_data_lanes_count_ep(dsi->dev->of_node, 1, 0, 1, 4);
+ ret = drm_of_get_data_lanes_count_ep(dsi->dev->of_node,
+ dsi->info->out_port,
+ 0, 1, 4);
if (ret < 0)
return dev_err_probe(dsi->dev, ret,
"missing or invalid data-lanes property\n");
@@ -1525,6 +1528,7 @@ static const struct rzg2l_mipi_dsi_hw_info rzv2h_mipi_dsi_info = {
.link_reg_offset = 0,
.min_dclk = 5440,
.max_dclk = 187500,
+ .out_port = 1,
.features = RZ_MIPI_DSI_FEATURE_16BPP,
};

@@ -1535,6 +1539,7 @@ static const struct rzg2l_mipi_dsi_hw_info rzg2l_mipi_dsi_info = {
.link_reg_offset = 0x10000,
.min_dclk = 5803,
.max_dclk = 148500,
+ .out_port = 1,
};

static const struct of_device_id rzg2l_mipi_dsi_of_table[] = {
--
2.43.0