[PATCH v6 1/2] dt-bindings: display: panel: Add ChipWealth CH13726A AMOLED driver

Aaron Kling via B4 Relay
2026-04-22T07:43:41Z

From: Aaron Kling <webgeek1234@gmail.com>

The Chip Wealth Technology CH13726A AMOLED driver is a single chip
solution for MIPI-DSI. This is used for the AYN Thor bottom panel.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
---
.../display/panel/chipwealth,ch13726a.yaml | 67 ++++++++++++++++++++++
1 file changed, 67 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/chipwealth,ch13726a.yaml b/Documentation/devicetree/bindings/display/panel/chipwealth,ch13726a.yaml
new file mode 100644
index 00000000000000..c8d7b61037e622
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/chipwealth,ch13726a.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/chipwealth,ch13726a.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Chip Wealth Technology CH13726A AMOLED driver
+
+maintainers:
+ - Neil Armstrong <neil.armstrong@linaro.org>
+
+description:
+ Chip Wealth Technology CH13726A is a single-chip solution
+ for AMOLED connected using a MIPI-DSI video interface.
+
+allOf:
+ - $ref: panel-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: ayntec,thor-panel-bottom
+ - const: chipwealth,ch13726a
+
+ reg:
+ maxItems: 1
+ description: DSI virtual channel
+
+ vdd-supply: true
+ vddio-supply: true
+ vdd1v2-supply: true
+ avdd-supply: true
+
+ port: true
+ reset-gpios: true
+ rotation: true
+
+required:
+ - compatible
+ - reg
+ - vdd-supply
+ - vddio-supply
+ - vdd1v2-supply
+ - avdd-supply
+ - reset-gpios
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+
+ dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ panel@0 {
+ compatible = "ayntec,thor-panel-bottom", "chipwealth,ch13726a";
+ reg = <0>;
+ vdd1v2-supply = <&vreg_l11b_1p2>;
+ vddio-supply = <&vdd_disp_1v8>;
+ vdd-supply = <&vreg_l13b_3p0>;
+ avdd-supply = <&vdd_disp2_2v8>;
+ reset-gpios = <&tlmm 133 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+...

--
2.53.0