From: dongxuyang@eswincomputing.com
To: ukleinek@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, ben-linux@fluff.org,
ben.dooks@codethink.co.uk, p.zabel@pengutronix.de,
linux-pwm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: ningyu@eswincomputing.com, linmin@eswincomputing.com,
xuxiang@eswincomputing.com, wangguosheng@eswincomputing.com,
pinkesh.vaghela@einfochips.com,
Xuyang Dong <dongxuyang@eswincomputing.com>
Subject: [PATCH v5 1/2] dt-bindings: pwm: dwc: add optional reset
Date: Thu, 23 Apr 2026 16:37:31 +0800 [thread overview]
Message-ID: <20260423083731.1226-1-dongxuyang@eswincomputing.com> (raw)
In-Reply-To: <20260423083644.1168-1-dongxuyang@eswincomputing.com>
From: Xuyang Dong <dongxuyang@eswincomputing.com>
The DesignWare PWM includes separate reset signals dedicated to each clock
domain:
The presetn signal resets logic in pclk domain.
The timer_N_resetn signal resets logic in the timer_N_clk domain.
The resets are active-low.
EIC7700 use DesignWare IP for PWM controllers. Add ESWIN EIC7700 support
in snps,dw-apb-timers-pwm2.yaml
Signed-off-by: Xuyang Dong <dongxuyang@eswincomputing.com>
---
.../bindings/pwm/snps,dw-apb-timers-pwm2.yaml | 29 ++++++++++++++++---
1 file changed, 25 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml b/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml
index 7523a89a1773..d9685fdd72a7 100644
--- a/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml
+++ b/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml
@@ -20,12 +20,11 @@ description:
instead of having to encode the IP version number in the device tree
compatible.
-allOf:
- - $ref: pwm.yaml#
-
properties:
compatible:
- const: snps,dw-apb-timers-pwm2
+ enum:
+ - snps,dw-apb-timers-pwm2
+ - eswin,eic7700-pwm
reg:
maxItems: 1
@@ -43,6 +42,12 @@ properties:
- const: bus
- const: timer
+ resets:
+ minItems: 1
+ items:
+ - description: Interface bus reset
+ - description: PWM timer logic reset
+
snps,pwm-number:
$ref: /schemas/types.yaml#/definitions/uint32
description: The number of PWM channels configured for this instance
@@ -54,6 +59,22 @@ required:
- clocks
- clock-names
+allOf:
+ - $ref: pwm.yaml#
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: eswin,eic7700-pwm
+ then:
+ properties:
+ resets:
+ items:
+ - description: Interface bus reset
+ required:
+ - resets
+
additionalProperties: false
examples:
--
2.34.1
next prev parent reply other threads:[~2026-04-23 8:38 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-23 8:36 [PATCH v5 0/2] Update designware pwm driver Xuyang Dong
2026-04-23 8:37 ` dongxuyang [this message]
2026-04-23 17:30 ` [PATCH v5 1/2] dt-bindings: pwm: dwc: add optional reset Conor Dooley
2026-04-23 8:38 ` [PATCH v5 2/2] pwm: dwc: add of/platform support dongxuyang
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