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Thu, 23 Apr 2026 04:33:01 -0700 (PDT) Received: from fedora ([103.74.236.136]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c79770512afsm15535646a12.31.2026.04.23.04.32.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Apr 2026 04:33:00 -0700 (PDT) From: Shaunak Datar To: lee@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: devicetree@vger.kernel.org, daniel.lezcano@kernel.org, Shaunak Datar Subject: [PATCH v2] dt-bindings: mfd: hisilicon,hi655x-pmic: Convert to DT schema Date: Thu, 23 Apr 2026 17:02:37 +0530 Message-ID: <20260423113237.260652-1-shaunakkdatar@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260422200200.126728-1-shaunakkdatar@gmail.com> References: <20260422200200.126728-1-shaunakkdatar@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Convert the Hisilicon Hi655x PMIC binding from the text format to DT schema to enable dtbs_check validation. The 'regulators' child node is added based on existing usage in arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts, which defines child regulator nodes not documented in the original .txt binding. The uppercase LDO names are retained to match existing DTS usage. Signed-off-by: Shaunak Datar --- Changes in v2: - Drop the $nodename property - Constrain LDO according to actual hardware regulators - Drop 'regulators' from required list - Drop example root node wrapper and use 1 address/size cell. - Elaborate about 'regulators' addition and uppercase LDO naming in the commit message .../bindings/mfd/hisilicon,hi655x-pmic.yaml | 80 +++++++++++++++++++ .../bindings/mfd/hisilicon,hi655x.txt | 33 -------- 2 files changed, 80 insertions(+), 33 deletions(-) create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hi655x-pmic.yaml delete mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x-pmic.yaml b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x-pmic.yaml new file mode 100644 index 000000000000..6f28f472e0f5 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x-pmic.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/hisilicon,hi655x-pmic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon Hi655x Power Management Integrated Circuit + +maintainers: + - Chen Feng + - Daniel Lezcano + +description: + The hardware layout for access PMIC Hi655x from AP SoC Hi6220. + Between PMIC Hi655x and Hi6220, the physical signal channel is SSI. + We can use memory-mapped I/O to communicate. + +properties: + compatible: + const: hisilicon,hi655x-pmic + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + + pmic-gpios: + maxItems: 1 + description: The GPIO used by PMIC IRQ + + '#clock-cells': + const: 0 + + clock-output-names: + maxItems: 1 + + regulators: + type: object + additionalProperties: false + + patternProperties: + '^LDO(2|7|10|13|14|15|17|19|21|22)$': + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - pmic-gpios + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include + + pmic: pmic@f8000000 { + compatible = "hisilicon,hi655x-pmic"; + reg = <0xf8000000 0x1000>; + #clock-cells = <0>; + interrupt-controller; + #interrupt-cells = <2>; + pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + + regulators { + ldo2: LDO2 { + regulator-name = "LDO2_2V8"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3200000>; + regulator-enable-ramp-delay = <120>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt deleted file mode 100644 index 9630ac0e4b56..000000000000 --- a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt +++ /dev/null @@ -1,33 +0,0 @@ -Hisilicon Hi655x Power Management Integrated Circuit (PMIC) - -The hardware layout for access PMIC Hi655x from AP SoC Hi6220. -Between PMIC Hi655x and Hi6220, the physical signal channel is SSI. -We can use memory-mapped I/O to communicate. - -+----------------+ +-------------+ -| | | | -| Hi6220 | SSI bus | Hi655x | -| |-------------| | -| |(REGMAP_MMIO)| | -+----------------+ +-------------+ - -Required properties: -- compatible: Should be "hisilicon,hi655x-pmic". -- reg: Base address of PMIC on Hi6220 SoC. -- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain). -- pmic-gpios: The GPIO used by PMIC IRQ. -- #clock-cells: From common clock binding; shall be set to 0 - -Optional properties: -- clock-output-names: From common clock binding to override the - default output clock name - -Example: - pmic: pmic@f8000000 { - compatible = "hisilicon,hi655x-pmic"; - reg = <0x0 0xf8000000 0x0 0x1000>; - interrupt-controller; - #interrupt-cells = <2>; - pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; - #clock-cells = <0>; - } -- 2.53.0