On Fri, Apr 24, 2026 at 05:54:35PM +0800, dongxuyang@eswincomputing.com wrote:
> From: Xuyang Dong <dongxuyang@eswincomputing.com>
> 
> The DesignWare PWM includes separate reset signals dedicated to each clock
> domain:
> The presetn signal resets logic in pclk domain.
> The timer_N_resetn signal resets logic in the timer_N_clk domain.
> The resets are active-low.
> 
> EIC7700 use DesignWare IP for PWM controllers. Add ESWIN EIC7700 support
>  in snps,dw-apb-timers-pwm2.yaml
> 
> Signed-off-by: Xuyang Dong <dongxuyang@eswincomputing.com>

Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable