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Tue, 28 Apr 2026 13:07:45 -0700 (PDT) Received: from localhost ([2a00:79e0:2e7c:8:4ff5:9607:c7e5:48f3]) by smtp.gmail.com with UTF8SMTPSA id a92af1059eb24-12ddd9a63a7sm3079240c88.11.2026.04.28.13.07.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 28 Apr 2026 13:07:44 -0700 (PDT) From: Brian Norris To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Jonathan Hunter , Heiko Stuebner , Matthias Brugger , AngeloGioacchino Del Regno , Bjorn Andersson , Konrad Dybcio Cc: devicetree@vger.kernel.org, Doug Anderson , linux-arm-kernel@lists.infradead.org, Tzung-Bi Shih , chrome-platform@lists.linux.dev, Brian Norris , linux-rockchip@lists.infradead.org, Julius Werner , Alim Akhtar , cros-qcom-dts-watchers@chromium.org, linux-arm-msm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/7] arm64: dts: mediatek: Add #{address,size}-cells to Chromium-based /firmware Date: Tue, 28 Apr 2026 13:06:57 -0700 Message-ID: <20260428200712.2660635-6-briannorris@chromium.org> X-Mailer: git-send-email 2.54.0.545.g6539524ca2-goog In-Reply-To: <20260428200712.2660635-1-briannorris@chromium.org> References: <20260428200712.2660635-1-briannorris@chromium.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Chromium/Depthcharge bootloaders may dynamically add a few device nodes to a system's DTB under a /firmware node. A typical DT looks something like the following: / { firmware { ranges; coreboot { compatible = "coreboot"; reg = <...>; ...; }; }; }; Notably, the /firmware node has an empty 'ranges', but does not have address/size-cells. Commit 6e5773d52f4a ("of/address: Fix WARN when attempting translating non-translatable addresses") started requiring #address-cells for a device's parent if we want to use the reg resource in a device node. This leads to errors like the following: [ 7.763870] coreboot_table firmware:coreboot: probe with driver coreboot_table failed with error -22 Add appropriate #{address,size}-cells to work around the problem. Note that Google has also patched the Depthcharge bootloader source to add {address,size}-cells [1], but bootloader updates are typically delivered only via Google OS updates. Not all users install Google software updates, and even if they do, Google may not produce updated binaries for all/older devices. [1] https://lore.kernel.org/all/20241209092809.GA3246424@google.com/ https://crrev.com/c/6051580 ("coreboot: Insert #address-cells and #size-cells for firmware node") Closes: https://lore.kernel.org/all/aeKlYzTiL0OB1y3g@google.com/ Fixes: 6e5773d52f4a ("of/address: Fix WARN when attempting translating non-translatable addresses") Signed-off-by: Brian Norris --- arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 5 +++++ arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 5 +++++ arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi | 5 +++++ arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi | 5 +++++ arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 5 +++++ arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 5 +++++ 6 files changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi index a0573bc359fb..777da2129e77 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi @@ -16,6 +16,11 @@ aliases { mmc2 = &mmc3; }; + firmware { + #address-cells = <2>; + #size-cells = <2>; + }; + memory@40000000 { device_type = "memory"; reg = <0 0x40000000 0 0x80000000>; diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi index a8e257b21a88..a906ec1ce672 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -21,6 +21,11 @@ chosen { stdout-path = "serial0:115200n8"; }; + firmware { + #address-cells <2>; + #size-cells <2>; + }; + backlight_lcd0: backlight_lcd0 { compatible = "pwm-backlight"; pwms = <&pwm0 0 500000>; diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi b/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi index ff20376a44d7..2b327d9ef65e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi @@ -26,6 +26,11 @@ chosen { stdout-path = "serial0:115200n8"; }; + firmware { + #address-cells = <2>; + #size-cells = <2>; + }; + memory@40000000 { device_type = "memory"; /* The size should be filled in by the bootloader. */ diff --git a/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi b/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi index 8e423504ec05..ed63c74cf238 100644 --- a/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi @@ -41,6 +41,11 @@ dmic-codec { wakeup-delay-ms = <100>; }; + firmware { + #address-cells = <2>; + #size-cells = <2>; + }; + memory@40000000 { device_type = "memory"; /* The size will be filled in by the bootloader */ diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index eadf1b2d156f..b3850be25594 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -25,6 +25,11 @@ chosen { stdout-path = "serial0:115200n8"; }; + firmware { + #address-cells = <2>; + #size-cells = <2>; + }; + memory@40000000 { device_type = "memory"; reg = <0 0x40000000 0 0x80000000>; diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi index f1ff64a84267..4992631dd504 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -42,6 +42,11 @@ dmic-codec { wakeup-delay-ms = <50>; }; + firmware { + #address-cells = <2>; + #size-cells = <2>; + }; + memory@40000000 { device_type = "memory"; reg = <0 0x40000000 0 0x80000000>; -- 2.54.0.545.g6539524ca2-goog