From: Jia Wang <wangjia@ultrarisc.com>
To: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Paul Walmsley" <pjw@kernel.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
Jia Wang <wangjia@ultrarisc.com>
Subject: [PATCH v7 2/4] serial: 8250_dw: build Renesas RZN1 CPR value from DW_UART_CPR_* definitions
Date: Wed, 29 Apr 2026 17:13:26 +0800 [thread overview]
Message-ID: <20260429-ultrarisc-serial-v7-2-e475cce9e274@ultrarisc.com> (raw)
In-Reply-To: <20260429-ultrarisc-serial-v7-0-e475cce9e274@ultrarisc.com>
Replace the magic CPR value for Renesas RZ/N1 with a composition using
DW_UART_CPR_* bit/field definitions and FIELD_PREP_CONST().
Introduce a helper macro to convert a FIFO size (bytes) into the CPR
FIFO_MODE field value, with BUILD_BUG_ON_ZERO() checks for alignment and
bounds. Use it to replace the literal FIFO_MODE values in the RZN1.
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
---
drivers/tty/serial/8250/8250_dw.c | 10 +++++++++-
drivers/tty/serial/8250/8250_dwlib.h | 8 +++++++-
2 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
index 467755bf0092..480f82d89856 100644
--- a/drivers/tty/serial/8250/8250_dw.c
+++ b/drivers/tty/serial/8250/8250_dw.c
@@ -937,7 +937,15 @@ static const struct dw8250_platform_data dw8250_armada_38x_data = {
static const struct dw8250_platform_data dw8250_renesas_rzn1_data = {
.usr_reg = DW_UART_USR,
- .cpr_value = 0x00012f32,
+ .cpr_value = FIELD_PREP_CONST(DW_UART_CPR_ABP_DATA_WIDTH, 2) |
+ DW_UART_CPR_AFCE_MODE |
+ DW_UART_CPR_THRE_MODE |
+ DW_UART_CPR_ADDITIONAL_FEATURES |
+ DW_UART_CPR_FIFO_ACCESS |
+ DW_UART_CPR_FIFO_STAT |
+ DW_UART_CPR_SHADOW |
+ DW_UART_CPR_DMA_EXTRA |
+ DW_UART_CPR_FIFO_MODE_FROM_SIZE(16),
.quirks = DW_UART_QUIRK_CPR_VALUE | DW_UART_QUIRK_IS_DMA_FC,
};
diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h
index 2f26f9ecacbe..1fe52332e774 100644
--- a/drivers/tty/serial/8250/8250_dwlib.h
+++ b/drivers/tty/serial/8250/8250_dwlib.h
@@ -6,6 +6,7 @@
#include <linux/bitfield.h>
#include <linux/bits.h>
+#include <linux/build_bug.h>
#include <linux/io.h>
#include <linux/types.h>
@@ -68,8 +69,13 @@
#define DW_UART_CPR_DMA_EXTRA BIT(13)
#define DW_UART_CPR_FIFO_MODE GENMASK(23, 16)
-/* Helper for FIFO size calculation */
+/* Helpers for FIFO size calculation */
#define DW_UART_CPR_FIFO_SIZE(a) (FIELD_GET(DW_UART_CPR_FIFO_MODE, (a)) * 16)
+#define DW_UART_CPR_FIFO_MODE_FROM_SIZE(size) \
+ (FIELD_PREP_CONST(DW_UART_CPR_FIFO_MODE, \
+ BUILD_BUG_ON_ZERO((size) > 2048) + \
+ BUILD_BUG_ON_ZERO((size) % 16) + \
+ ((size) / 16)))
struct dw8250_port_data {
/* Port properties */
--
2.34.1
next prev parent reply other threads:[~2026-04-29 9:13 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-29 9:13 [PATCH v7 0/4] serial: 8250_dw: Add support for UltraRISC DP1000 UART Jia Wang
2026-04-29 9:13 ` [PATCH v7 1/4] serial: 8250_dwlib: move DesignWare register definitions to header Jia Wang
2026-04-29 9:13 ` Jia Wang [this message]
2026-04-29 10:45 ` [PATCH v7 2/4] serial: 8250_dw: build Renesas RZN1 CPR value from DW_UART_CPR_* definitions Andy Shevchenko
2026-04-29 10:48 ` Ilpo Järvinen
2026-04-29 9:13 ` [PATCH v7 3/4] dt-bindings: serial: snps-dw-apb-uart: Add UltraRISC DP1000 UART Jia Wang
2026-04-29 9:13 ` [PATCH v7 4/4] serial: 8250_dw: Use a fixed CPR value for " Jia Wang
2026-04-29 10:55 ` Ilpo Järvinen
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