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From: Caleb James DeLisle <cjd@cjdns.fr>
To: linux-mips@vger.kernel.org
Cc: tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, Caleb James DeLisle <cjd@cjdns.fr>
Subject: [PATCH v3 0/2] irqchip/econet-en751221: Support MIPS 34Kc VEIC mode
Date: Thu, 30 Apr 2026 16:41:55 +0000	[thread overview]
Message-ID: <20260430164157.6026-1-cjd@cjdns.fr> (raw)

MIPS 34Kc and 1004Kc have a Vectored External Interrupt mode, where
CPU interrupts are re-routed to the external interrupt controller,
which prioritizes them, renumbers them, and integrates them with its
own, creating a flat interrupt table.

This bypasses the CPU interrupt controller entirely, which is not ideal
for modern Linux which formalizes the interrupt hierarchy. The 1004Kc
standardized the interrupt controller (MIPS_GIC) so it can be viewed as
"part of the CPU" and it's tolerable for it to be more closely coupled
to arch/mips/* than a typical interrupt controller driver.

The 34Kc supports VEIC mode, but the interrupt controller is not
standardized, so it's different per-SoC. This creates a challenge of
writing a reasonably modular driver, given hardware that actually does
take over the interrupt hierarchy.

Ordinarily we wouldn't bother with VEIC on the 34Kc but it is required
for MIPS_MT_SMP, so without it you get a single thread processor. The
only other 34Kc device which has an in-tree DTS file is
realtek,rtl9302-soc, in OpenWrt there is this, realtek,rtl839x-soc, and
lantiq,xway. Of these, the realtek,rtl839x-soc has multi-thread support
via an out-of-tree patch to its interrupt controller, and the lantiq
is not 34Kc compliant in that it lacks the VEIC cpu flag, causing linux
to fall back on legacy interrupts despite CPU_MIPSR2_IRQ_EI being set.

This patchset aims to tackle this challenge in a way that is most
likely generalizable to other 34Kc interrupt controllers which are
facing the same problem.

Changes from v2:
* Fix goofup that changes were not actually in the patch...
* v2: https://lore.kernel.org/linux-mips/20260430150809.1827881-1-cjd@cjdns.fr/

Changes from v1:
* Address notes from Thomas Gleixner (Thank you very much!)
* Additional info in cover letter regarding lantiq,xway
* v1: https://lore.kernel.org/linux-mips/20260425123531.270548-1-cjd@cjdns.fr/

Caleb James DeLisle (2):
  dt-bindings: interrupt-controller: econet: Add CPU interrupt mapping
  irqchip/econet-en751221: Support MIPS 34Kc VEIC mode

 .../econet,en751221-intc.yaml                 |  20 ++
 drivers/irqchip/irq-econet-en751221.c         | 187 +++++++++++++++++-
 2 files changed, 199 insertions(+), 8 deletions(-)


base-commit: e8be82c2d77ec1bb0148406e54b105028a83537e
-- 
2.39.5


             reply	other threads:[~2026-04-30 16:42 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-30 16:41 Caleb James DeLisle [this message]
2026-04-30 16:41 ` [PATCH v3 1/2] dt-bindings: interrupt-controller: econet: Add CPU interrupt mapping Caleb James DeLisle
2026-04-30 16:41 ` [PATCH v3 2/2] irqchip/econet-en751221: Support MIPS 34Kc VEIC mode Caleb James DeLisle

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