From: Akhil P Oommen <akhilpo@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Rob Clark <robin.clark@oss.qualcomm.com>,
Sean Paul <sean@poorly.run>, Dmitry Baryshkov <lumag@kernel.org>,
Abhinav Kumar <abhinav.kumar@linux.dev>,
Jessica Zhang <jesszhan0024@gmail.com>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org,
Akhil P Oommen <akhilpo@oss.qualcomm.com>
Subject: [PATCH v2 2/4] dt-bindings: arm-smmu: Update the description for Glymur GPU SMMU
Date: Fri, 01 May 2026 22:40:38 +0530 [thread overview]
Message-ID: <20260501-glymur-gpu-dt-v2-2-2f128b5596bb@oss.qualcomm.com> (raw)
In-Reply-To: <20260501-glymur-gpu-dt-v2-0-2f128b5596bb@oss.qualcomm.com>
Add the interconnects property to the common SMMU properties and extend
the sm8750 clock description section to also cover Glymur since it uses
the same single "hlos" vote clock.
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 06fb5c8e7547cb7a92823adc2772b94f747376a6..df67ab2aa715f81f5a10678b936558827c105bd9 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -243,6 +243,9 @@ properties:
minItems: 1
maxItems: 3
+ interconnects:
+ maxItems: 1
+
nvidia,memory-controller:
description: |
A phandle to the memory controller on NVIDIA Tegra186 and later SoCs.
@@ -566,7 +569,9 @@ allOf:
properties:
compatible:
items:
- - const: qcom,sm8750-smmu-500
+ - enum:
+ - qcom,glymur-smmu-500
+ - qcom,sm8750-smmu-500
- const: qcom,adreno-smmu
- const: qcom,smmu-500
- const: arm,mmu-500
--
2.51.0
next prev parent reply other threads:[~2026-05-01 17:11 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-01 17:10 [PATCH v2 0/4] Devicetree support for Glymur GPU Akhil P Oommen
2026-05-01 17:10 ` [PATCH v2 1/4] dt-bindings: display/msm: gpu: Document Adreno X2-185 Akhil P Oommen
2026-05-03 14:10 ` Krzysztof Kozlowski
2026-05-03 14:13 ` Krzysztof Kozlowski
2026-05-01 17:10 ` Akhil P Oommen [this message]
2026-05-03 14:14 ` [PATCH v2 2/4] dt-bindings: arm-smmu: Update the description for Glymur GPU SMMU Krzysztof Kozlowski
2026-05-01 17:10 ` [PATCH v2 3/4] arm64: dts: qcom: glymur: Add GPU smmu node Akhil P Oommen
2026-05-01 17:10 ` [PATCH v2 4/4] arm64: dts: qcom: Add GPU support for Glymur Akhil P Oommen
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