From: Ender Hsieh <andhsieh@nvidia.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>
Cc: <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-aspeed@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>,
Andrew Lunn <andrew@lunn.ch>,
Marc Olberding <molberding@nvidia.com>,
Jacky Chou <jacky_chou@aspeedtech.com>
Subject: [PATCH 0/1] aspeed: msx4: enable BMC networking via MAC0
Date: Tue, 5 May 2026 14:05:40 +0900 [thread overview]
Message-ID: <20260505050541.3031447-1-andhsieh@nvidia.com> (raw)
Add the &mac0/&mdio3/ethphy3 nodes to the NVIDIA MSX4 board dts to
enable BMC networking. These nodes were intentionally omitted in
commit f28674fab34f ("ARM: dts: aspeed: Add NVIDIA MSX4 HPM") at
Andrew Lunn's request, pending RGMII delay handling clarification.
Following his guidance on linux-aspeed [1], the U-Boot bootloader
has been modified to stop enabling MAC clock delays on the SoC
side. With phy-mode = "rgmii-id", the PHY now adds the required
~2ns delay without any double-delay from the MAC controller.
Tested on alon8 hardware: 1G link negotiation succeeds with this
change in coordination with the U-Boot patch [2].
[1] https://patch.msgid.link/eac09481-0ba1-4ac2-ad8c-d859822ff0d5@lunn.ch
[2] https://patch.msgid.link/20260504044702.2613879-1-andhsieh@nvidia.com
Ender Hsieh (1):
ARM: dts: aspeed: msx4: enable BMC networking via MAC0
.../dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
--
2.34.1
next reply other threads:[~2026-05-05 5:06 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-05 5:05 Ender Hsieh [this message]
2026-05-05 5:05 ` [PATCH 1/1] ARM: dts: aspeed: msx4: enable BMC networking via MAC0 Ender Hsieh
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