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Tue, 5 May 2026 20:46:25 -0700 From: Akhil R To: CC: , , , , , , , , , , , , Subject: Re: [PATCH v6 00/10] Add GPCDMA support in Tegra264 Date: Wed, 6 May 2026 09:16:24 +0530 Message-ID: <20260506034624.18782-1-akhilrajeev@nvidia.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002316:EE_|DM4PR12MB5747:EE_ X-MS-Office365-Filtering-Correlation-Id: ae932bae-02d0-4e18-e0bd-08deab2219bb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|82310400026|36860700016|1800799024|56012099003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: 43bogO3sCKgtTi1MQVuNKSRgA6zlN7vdq/s08EzCARcqL0fclYv79MyubLY8T9bNziGQFkVC1m6Hxa6iektZo+sBJguubtFzqFwdiaPhOvPoCcTm3ycAFeHvbCPygtwq2naOAP+QEfSS3NcKyEz1VFg7M6y/5rGxut3aFXb+q2pphOWPmhNtFRb9THUUjs4PbeZ7sIE4TETD6BtsN/IhgL2LIFEPj+CCfake3VHy6MMFdXNGhy44s9nn+OG1/XiN7nQFaeeFkil1Oz1z8TJJW4pOdVaxxXsytZN1+0w2DBSZnSLAB8NACA3I8V0c8KFGltRCfM4MqpT3L0mfZYsExUaiArx/G+VXofk3K7zm55LYaIW/frUn6l9y2XmxiAhbsHiqqSM0cEXjauXoRnQ+PrTutO/VGcpir10eqkQXFOM9q1WERd/qBiP0lujFNPeLnnff0Pl/GhHIflZ9lGp306Lu7Nkfc3upFcc7MlGzdByhPBzOf1AefgbXAQQN3cJ2L1mUG+L8MgT81DaPwEkVq5ASlgp4IHJxrIB0MSBYmsaIWSxLr9fkt6/hjww8lLwUbXjrsjupLCeznw9XXMyJXPFR5KVc4gab+diXe4/HpHJ21eWnEKYwjCZdi7Q4O12dT3O/KWxPXSlT6Y5XzEbnLkW1GcP4W3hQEaGIMta/80fx1umagHqGK4KL6dUmB2RSXNHfGw5H6fV+8ama4eAF18o+XmJKCWY6YnVbkzUg+s8= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(7416014)(82310400026)(36860700016)(1800799024)(56012099003)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: YgoDTsc5FjZWhz/LyyrPzVVmgY2ZGO6cNTHr5eyqbswyZ7E6dhxNVqQPupRFS7H1pUUFupeQNIQb55cocSNYJfCeL7ZAiltvhBdDlN7rsxAIzwzZwt0TbOLrkLoNUUmrVdxcBnqGuG6mfQie1MG9o3NID3vNGrffiWGjJ4OWSaWQGQoDUVuAUonBECD4E2g3ZaZEtL6ZsxWN7dHwlusWqH+VfckMumnPO0+a6aaQbtfYgLNmMRBFFowdaq0RBQS1lBwJ/Kp5J2IEduBN1jfjDeK7zAGCiq/jhVMzMWu/00Bp2KbxTbWNXNYmDKnP6UFenH2YEbjpGIZ8VkOuD4zqcXuceKYGkNi1F1kWUUFKZcg8JXXwwxuBQWSyra7Ap/kohYyc9sSPaITKzL0ipm0f6PybZG9ByzgHwiCF+NhugWFH2AkZsl5el7Cex+BvycQU X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2026 03:46:48.0814 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ae932bae-02d0-4e18-e0bd-08deab2219bb X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002316.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5747 On Fri, 10 Apr 2026 09:09:38 +0100, Jon Hunter wrote: > On 31/03/2026 19:06, Jon Hunter wrote: >> >> On 31/03/2026 11:22, Akhil R wrote: >>> This series adds support for GPCDMA in Tegra264 with additional >>> support for separate stream ID for each channel. Tegra264 GPCDMA >>> controller has changes in the register offsets and uses 41-bit >>> addressing for memory. Add changes in the tegra186-gpc-dma driver >>> to support these. >>> >>> v5->v6: >>> - Replace dev_err() with dev_err_probe() in the probe function for fixed >>> return values also. >>> v4->v5: >>> - Use dev_err_probe() when returning error from the probe function. >>> - Remove tegra194 and tegra234 compatible from the reset 'if' condition >>> in the bindings as suggested in v2 (which I missed). >>> v3->v4: >>> - Split device tree changes to two patches. >>> - Reordered patches to have fixes first. >>> - Added fixes tag to dt-bindings and device tree changes. >>> v2->v3: >>> - Add description for iommu-map property and update commit descriptions. >>> - Use enum for compatible string instead of const. >>> - Remove unused registers from struct tegra_dma_channel_regs. >>> - Use devm_of_dma_controller_register() to register the DMA controller. >>> - Remove return value check for mask setting in the driver as the bitmask >>> value is always greater than 32. >>> v1->v2: >>> - Fix dt_bindings_check warnings >>> - Drop fallback compatible "nvidia,tegra186-gpcdma" from Tegra264 DT >>> - Use dma_addr_t for sg_req src/dst fields and drop separate high_add >>> variable and check for the addr_bits only when programming the >>> registers. >>> - Update address width to 39 bits for Tegra234 and before since the SMMU >>> supports only up to 39 bits till Tegra234. >>> - Add a patch to do managed DMA controller registration. >>> - Describe the second iteration in the probe. >>> - Update commit descriptions. >>> >>> Akhil R (10): >>> dt-bindings: dma: nvidia,tegra186-gpc-dma: Make reset optional >>> arm64: tegra: Remove fallback compatible for GPCDMA >>> dt-bindings: dma: nvidia,tegra186-gpc-dma: Add iommu-map property >>> dmaengine: tegra: Make reset control optional >>> dmaengine: tegra: Use struct for register offsets >>> dmaengine: tegra: Support address width > 39 bits >>> dmaengine: tegra: Use managed DMA controller registration >>> dmaengine: tegra: Use iommu-map for stream ID >>> dmaengine: tegra: Add Tegra264 support >>> arm64: tegra: Enable GPCDMA in Tegra264 and add iommu-map >>> >>> .../bindings/dma/nvidia,tegra186-gpc-dma.yaml | 32 +- >>> .../arm64/boot/dts/nvidia/tegra264-p3834.dtsi | 4 + >>> arch/arm64/boot/dts/nvidia/tegra264.dtsi | 3 +- >>> drivers/dma/tegra186-gpc-dma.c | 429 +++++++++++------- >>> 4 files changed, 284 insertions(+), 184 deletions(-) >>> >> >> For the series ... >> >> Reviewed-by: Jon Hunter > > I am not sure if it is too late to pick this up for v7.1, but we would > like to get this into -next if you are happy with it. Hi Vinod, Just a gentle reminder on this series. Could you please take a look? Please let me know if you see any concerns. Best Regards, Akhil