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Wed, 6 May 2026 09:09:46 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , , , , , CC: , , , , , , Subject: [PATCH v2 13/13] arm64: dts: ti: k3-j784s4-j742s2-evm-common: fix USB clocking for compliance Date: Wed, 6 May 2026 19:39:45 +0530 Message-ID: <20260506141040.1368918-14-s-vadapalli@ti.com> X-Mailer: git-send-email 2.51.1 In-Reply-To: <20260506141040.1368918-1-s-vadapalli@ti.com> References: <20260506141040.1368918-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH2PEPF0000009F:EE_|SN4PR10MB5606:EE_ X-MS-Office365-Filtering-Correlation-Id: a5ed6956-8f72-4c8f-0695-08deab79267f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|36860700016|7416014|82310400026|56012099003|18002099003|22082099003|921020; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: e38lsA2wlns/39/4LMq9Km060A/90rDk28pavMU89Vu7USa2AWQTu3Gxuy2jv6gQvYSuwjR860rUO3mTkdgLbVjejz2EZyABiM+0/3vhgBdeEIxdaHhatkcM7+YLpqSb1Rp3SfdhbqALhW/BcXZfuxnz1yDbO3yGOulEjKzesuVlU4H99U0W91UMJQBUwQOOO0Fw5xfEcx61QA0SKUZFE4rPKed4+Q7f/tHxIr+X8x5orjsm263Yvrde6SU48oeIxncjxzjJRxjEPe6sgN3PxvK4ak+BMLVIBN8opkozsbfZch4pw3DpLeI1aP2lhuNKXNe4LlM9qd3QCVTORNo53U2e7CW6hRYCJ4Rl1oQZfg36VQSwLQhagu/ujWtTHx8NXl2YOsOZWgTyYZEgzH15zVLJlXxl3Abpn8/HKZcXhf7ppAog515v0nxrTqeXB7f0 X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2026 14:09:55.7487 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a5ed6956-8f72-4c8f-0695-08deab79267f X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.21.194];Helo=[flwvzet200.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: CH2PEPF0000009F.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN4PR10MB5606 According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of the USB 3.2 Specification, SSC should be enabled by default. This protects against EMI violations. Hence, enable internal SSC for USB SuperSpeed. Fixes: 39b623c05c46 ("arm64: dts: ti: Refactor J784s4-evm to a common file") Fixes: bed97e94ee2d ("arm64: dts: ti: k3-j784s4-evm: Enable USB3 support") Cc: Signed-off-by: Siddharth Vadapalli --- v1: https://lore.kernel.org/r/20260505110631.1144200-14-s-vadapalli@ti.com/ Changes since v1: - Reordered properties in serdes_wiz0 node to place status at the end. arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi index ff3a85cbc524..43a74118e859 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi @@ -1010,11 +1010,17 @@ serdes0_usb_link: phy@3 { cdns,num-lanes = <1>; #phy-cells = <0>; cdns,phy-type = ; + cdns,ssc-mode = <2>; /* 2 for internal SSC */ resets = <&serdes_wiz0 4>; }; }; &serdes_wiz0 { + ti,core-clk-sel = <1>; /* Select internal reference clock */ + ti,ssc-enable; /* Enable SSC */ + ti,ssc-type = <1>; /* 1 for Downspread */ + ti,ssc-frequency-hz = <33000>; /* 33 KHz */ + ti,ssc-depth-per-mil = <5>; /* 0.5% depth */ status = "okay"; }; -- 2.51.1