[PATCH v2 03/13] arm64: dts: ti: k3-am642-sk: fix USB clocking for compliance

Siddharth Vadapalli
2026-05-06T14:08:55Z

From: Luis Parga <luis.parga@ti.com>

According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
the USB 3.2 Specification, SSC should be enabled by default. This protects
against EMI violations. Hence, enable internal SSC for USB SuperSpeed.

Fixes: 4e8aa4e3559a ("arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port")
Cc: <stable@vger.kernel.org>
Signed-off-by: Luis Parga <luis.parga@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---

v1:
https://lore.kernel.org/r/20260505110631.1144200-4-s-vadapalli@ti.com/
No changes since v1.

arch/arm64/boot/dts/ti/k3-am642-sk.dts | 6 ++++++
1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index d28a38c87f32..9f63fea5e6a4 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -463,6 +463,11 @@ &serdes_refclk {

&serdes_wiz0 {
bootph-all;
+ ti,core-clk-sel = <1>; /* Select internal reference clock */
+ ti,ssc-enable; /* Enable SSC */
+ ti,ssc-type = <1>; /* 1 for Downspread */
+ ti,ssc-frequency-hz = <33000>; /* 33 KHz */
+ ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
};

&serdes0 {
@@ -473,6 +478,7 @@ serdes0_usb_link: phy@0 {
cdns,num-lanes = <1>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_USB3>;
+ cdns,ssc-mode = <2>; /* 2 for internal SSC */
resets = <&serdes_wiz0 1>;
};
};
--
2.51.1