[PATCH v2 06/13] arm64: dts: ti: k3-am68-sk-baseboard: fix USB clocking for compliance

Siddharth Vadapalli
2026-05-06T14:09:14Z

Fixes: 067878e6cd25 ("arm64: dts: ti: k3-am68-sk: Add DT node for USB")
Cc: <stable@vger.kernel.org>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---

v1:
https://lore.kernel.org/r/20260505110631.1144200-7-s-vadapalli@ti.com/
No changes since v1.

arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
index 8178333fb2b4..d44c3685503c 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
@@ -793,6 +793,14 @@ &serdes_refclk {
clock-frequency = <100000000>;
};

+&serdes_wiz0 {
+ ti,core-clk-sel = <1>; /* Select internal reference clock */
+ ti,ssc-enable; /* Enable SSC */
+ ti,ssc-type = <1>; /* 1 for Downspread */
+ ti,ssc-frequency-hz = <33000>; /* 33 KHz */
+ ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
+};
+
&serdes0 {
status = "okay";

@@ -810,6 +818,7 @@ serdes0_usb_link: phy@2 {
cdns,num-lanes = <1>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_USB3>;
+ cdns,ssc-mode = <2>; /* 2 for internal SSC */
resets = <&serdes_wiz0 3>;
};
};
--
2.51.1