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From: "lianfeng.ouyang" <lianfeng.ouyang@starfivetech.com>
To: Olivia Mackall <olivia@selenic.com>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-crypto@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v1 2/2] hwrng: starfive: Update clk and reset sequence
Date: Tue, 12 May 2026 14:24:04 +0800	[thread overview]
Message-ID: <20260512062404.4540-3-lianfeng.ouyang@starfivetech.com> (raw)
In-Reply-To: <20260512062404.4540-1-lianfeng.ouyang@starfivetech.com>

From: Lianfeng Ouyang <lianfeng.ouyang@starfivetech.com>

for jhb100, While IP assert async reset, it may generate glitch
and propagate to downstream IP. In order to solve RDC issue,
conduct clock gating before asserting reset to prevent generating glitch.

Jia Jie Ho has resigned

Signed-off-by: Lianfeng Ouyang <lianfeng.ouyang@starfivetech.com>
---
 MAINTAINERS                          |  2 +-
 drivers/char/hw_random/jh7110-trng.c | 18 ++++++++++++++++--
 2 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index d3a6b3f6b6a0..729b20ecc697 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -25280,7 +25280,7 @@ F:	Documentation/devicetree/bindings/perf/starfive,jh8100-starlink-pmu.yaml
 F:	drivers/perf/starfive_starlink_pmu.c

 STARFIVE TRNG DRIVER
-M:	Jia Jie Ho <jiajie.ho@starfivetech.com>
+M:	Lianfeng Ouyang <lianfeng.ouyang@starfivetech.com>
 S:	Supported
 F:	Documentation/devicetree/bindings/rng/starfive*
 F:	drivers/char/hw_random/jh7110-trng.c
diff --git a/drivers/char/hw_random/jh7110-trng.c b/drivers/char/hw_random/jh7110-trng.c
index 9776f4daa044..f5eb434c94f5 100644
--- a/drivers/char/hw_random/jh7110-trng.c
+++ b/drivers/char/hw_random/jh7110-trng.c
@@ -234,12 +234,18 @@ static irqreturn_t starfive_trng_irq(int irq, void *priv)
 static void starfive_trng_cleanup(struct hwrng *rng)
 {
 	struct starfive_trng *trng = to_trng(rng);
+	bool is_jhb100 = device_is_compatible(trng->dev, "starfive,jhb100-trng");

 	writel(0, trng->base + STARFIVE_CTRL);

-	reset_control_assert(trng->rst);
+	if (!is_jhb100)
+		reset_control_assert(trng->rst);
+
 	clk_disable_unprepare(trng->hclk);
 	clk_disable_unprepare(trng->ahb);
+
+	if (is_jhb100)
+		reset_control_assert(trng->rst);
 }

 static int starfive_trng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
@@ -337,12 +343,19 @@ static int starfive_trng_probe(struct platform_device *pdev)

 	ret = devm_hwrng_register(&pdev->dev, &trng->rng);
 	if (ret) {
+		bool is_jhb100 = device_is_compatible(trng->dev, "starfive,jhb100-trng");
+
 		pm_runtime_disable(&pdev->dev);

-		reset_control_assert(trng->rst);
+		if (!is_jhb100)
+			reset_control_assert(trng->rst);
+
 		clk_disable_unprepare(trng->ahb);
 		clk_disable_unprepare(trng->hclk);

+		if (is_jhb100)
+			reset_control_assert(trng->rst);
+
 		return dev_err_probe(&pdev->dev, ret, "Failed to register hwrng\n");
 	}

@@ -378,6 +391,7 @@ static const struct dev_pm_ops starfive_trng_pm_ops = {

 static const struct of_device_id trng_dt_ids[] __maybe_unused = {
 	{ .compatible = "starfive,jh7110-trng" },
+	{ .compatible = "starfive,jhb100-trng" },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, trng_dt_ids);
--
2.43.0


      parent reply	other threads:[~2026-05-12  6:24 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-12  6:24 [PATCH v1 0/2] Add trng driver to JHB100 lianfeng.ouyang
2026-05-12  6:24 ` [PATCH v1 1/2] dt-bindings: Add bindings for StarFive JHB100 SoC trng controller lianfeng.ouyang
2026-05-12 17:15   ` Conor Dooley
2026-05-12 19:35     ` Conor Dooley
2026-05-12  6:24 ` lianfeng.ouyang [this message]

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