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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?YaO3xlN7tQz++3rRMkOGYkP2l/oZ9UDCJbzmwdn1lHQSDy/aw7mWRXpGtxY5?= =?us-ascii?Q?NYUVajP6wRZIZ7fGHDuc1MZgD0y6ESbNm3Hed79HwSwWAYt1SXq5yjBN2LjE?= =?us-ascii?Q?HUqPs4ZAKvFE7iNrLYhUtK2BQKtRVzO7+f2mKljIHIZsoBympW6Ov2irHPUR?= =?us-ascii?Q?VxQ5L/XlSUp650yTuD4aa4AVy2QsSLBiAGrEjIjQ8dW9gPRvoQphGxMXlfSz?= =?us-ascii?Q?o9FNJX7evMS1pCWh8HoEatawr86aUOrqQFs6WIKkq3upMFPBY/aE1mwpH2Ot?= =?us-ascii?Q?6/VvrXjP/RlGE4OKs6hZqoRTSkXjZIjSE1vW97rH5Z/7w6Y5oC2/aIkbfKLg?= =?us-ascii?Q?D3l778sVKVbC1aCkQcVYd9j6B7tB/V6aNaHUAB3CIzFmp592sfVGEmHN+HDL?= =?us-ascii?Q?ih85I0PF49YWY0MkHaLT1fTUlYI4UBJVY4A0SbiQ5vgdpmrr4mspC5Tkc7r8?= =?us-ascii?Q?VA2wuPa4JkeE+jAcKJ2lu/9MMKxRZdTh665wa/LYbDO1V/yVxNXmQOZzcIXp?= =?us-ascii?Q?D4oFuBuYLu7yIAvcRDl8yp+Wiq3o0zupteYrbWF4av8aWPba9ywviwsAfC8a?= =?us-ascii?Q?bcOlahPXjJSNjVKgcOZo1vIh+d33oQPnMMVIpb/e9P2RjcNuu6ccMNjUpw4x?= =?us-ascii?Q?6ctGMCKJg1CI5h3B8f1n0ixIkPAhpfvwc/xNN7IghcBNEkxlLVLPXAtpFTTd?= =?us-ascii?Q?eMqO0rGCi5DlbLNsJec5sAa+V461/e3yl3HtIt9BXNTPhcfuLfxCy+ImVRyD?= =?us-ascii?Q?4ttOkgzFJBIkd9I7KBRXBt/53KXu78GK+MFqXNQ9Of7H51pAi/fCg0UOgqKn?= =?us-ascii?Q?maPg36JerEmZPHnJN05FO52SPhd2a2bcy249+I1M5i06iOWbnZOJuNfCGu8e?= =?us-ascii?Q?1ulJz+uK6khIY8mQevu2apCEsy7j156c0zl2cRXup2+vcAZx4ushLp9Cg0yO?= =?us-ascii?Q?TwEx0lCmSEQXg5LclsA2ZxzzWwYoMcgvScnJfqGNKCve8btcsI19hukfNu8T?= =?us-ascii?Q?7H00cyM+2JVyBOfUowB2kFS2KyK2Ret0n1yBxVyqm4cfKFs6/2THyc+jEg+P?= =?us-ascii?Q?R+1op/hlEEmV1rh+dghACK2yc6TnZanpKOruT6SSNLLxFedzOMCuGEb+KDID?= =?us-ascii?Q?elWtbAMAXxQYS9prw9Q8rjFTO4PhJC8nYl3j8OBN9olxQ5fDGLDl8/2IUxk8?= =?us-ascii?Q?jhsQRJGXkHhbzVUt6e9XPsWQAq+UB/H+vZoTWgrw6vcYMQAnLJPLW1Klx4LP?= =?us-ascii?Q?38C2ljWxuyIvYZlk9jSgBei223TN7Iqd5jyhfKz4pMQTdED9HgEv9XVtXD92?= =?us-ascii?Q?v6vJ/4aWlEDTM9vhS1LvZDPVBHTAE49C+kFjuTPAHB1zxwjg/splHQ3bZLSR?= =?us-ascii?Q?mKHIjfBpK8zOIvCElyR3x7tuUsPytLMkLDmyd5Vu9LLmzWJbwuhmgBjR8AsW?= =?us-ascii?Q?+ZmXkutBR/gvSfvs4Me5bciCIlnmmIbj1Gu3KnEvglR1zH/f03JCwo/PgWmc?= =?us-ascii?Q?2avCvewe7U9fUTvTTo7ZckrbHvPNCs8szKSSGu1lNJGgZ5o7sZnpb63f2dOq?= =?us-ascii?Q?cbCKTTVNpt81qZtS030xlktaE1pJXX3S16zKUDFqblK1FhFsLvYI5RaS2Zgr?= =?us-ascii?Q?RymwlWuLkFtbrjABsuA7tLgjAYQfPkl7LeFsDjqkDpYhzhv56lf/l6Ejj1pj?= =?us-ascii?Q?cg5/s6sMZd55iLWdsak5PjvvwJ9ZAhVlAer91JavxY+2m9l9YFdKKZngDQCL?= =?us-ascii?Q?RKovWt6qGIHAbtKjxp2OsGuCyiwLVhA=3D?= X-OriginatorOrg: bp.renesas.com X-MS-Exchange-CrossTenant-Network-Message-Id: f0646c8f-284b-4661-be78-08deb0545e5e X-MS-Exchange-CrossTenant-AuthSource: TY6PR01MB17377.jpnprd01.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 May 2026 18:29:14.3180 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 53d82571-da19-47e4-9cb4-625a166a4a2a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Q01w+QlbiuzEJbr5GjvybFSJuHyp1vGusMR6fwRkQ6SdGLkJKD3y4kEjWTdlflQ1ZmwWWHQq/EkvCfgXoTF5+NHlNIgim4ir13sYE115vJ8= X-MS-Exchange-Transport-CrossTenantHeadersStamped: TYYPR01MB13037 The RZ/G3E SoC requires explicit SCU (Sampling Rate Converter Unit) reset and clock management unlike previous R-Car generations: - scu: SCU top-level module clock (CPG_CLKON_15.CLK6_ON) - scu_x2: SCU top-level double-rate clock (CPG_CLKON_15.CLK7_ON) - scu_supply: SCU register-access / housekeeping clock (CPG_CLKON_23.CLK14_ON, described by the HW manual as the system clock for "function modules excluding SRC0-9, DVC0-1, CTU0-1 and MIX0-1 (including the setting registers, etc.)") Without every one of them enabled, no SCU register is reachable. Add support for the shared SCU reset controller used by all SRC modules on the RZ/G3E SoC and manage scu_supply with the same lifetime as scu and scu_x2. This matches the hardware description and avoids unnecessary clock toggling. Signed-off-by: John Madieu --- Changes: v6: - Use devm_clk_get_optional_enabled() for scu_supply so it has the same lifetime as scu and scu_x2, and drop the manual clk_prepare_enable()/clk_disable_unprepare() in rsnd_src_init()/rsnd_src_quit(). This matches the HW description ("system clock for function modules excluding SRC0-9, DVC0-1, CTU0-1 and MIX0-1") and avoids unnecessary clock toggling on each stream open/close. - Acquire the per-SRC clock via rsnd_devm_clk_get_indexed() from patch 04/16, so both "src-N" and the legacy "src.N" work. - Drop the per-module name buffer and RSND_SRC_NAME_SIZE. v5: No changes v4: - Move shared SCU clocks (scu, scu_x2, scu_supply) from rsnd_priv variables into new struct rsnd_src_ctrl, following the rsnd_dma_ctrl pattern for shared non-per-instance module resources. - Keep original declaration order for struct device_node *node. v3: No changes v2: No changes sound/soc/renesas/rcar/rsnd.h | 1 + sound/soc/renesas/rcar/src.c | 50 ++++++++++++++++++++++++++++++++++- 2 files changed, 50 insertions(+), 1 deletion(-) diff --git a/sound/soc/renesas/rcar/rsnd.h b/sound/soc/renesas/rcar/rsnd.h index 186468a584fe..bdc4a99394de 100644 --- a/sound/soc/renesas/rcar/rsnd.h +++ b/sound/soc/renesas/rcar/rsnd.h @@ -698,6 +698,7 @@ struct rsnd_priv { /* * below value will be filled on rsnd_src_probe() */ + void *src_ctrl; void *src; int src_nr; diff --git a/sound/soc/renesas/rcar/src.c b/sound/soc/renesas/rcar/src.c index 43abe13137bf..0237b5d2e79e 100644 --- a/sound/soc/renesas/rcar/src.c +++ b/sound/soc/renesas/rcar/src.c @@ -53,6 +53,14 @@ struct rsnd_src { ((pos) = (struct rsnd_src *)(priv)->src + i); \ i++) +struct rsnd_src_ctrl { + struct clk *scu; + struct clk *scu_x2; + struct clk *scu_supply; +}; + +#define rsnd_priv_to_src_ctrl(priv) \ + ((struct rsnd_src_ctrl *)(priv)->src_ctrl) /* * image of SRC (Sampling Rate Converter) @@ -712,6 +720,8 @@ int rsnd_src_probe(struct rsnd_priv *priv) { struct device_node *node; struct device *dev = rsnd_priv_to_dev(priv); + struct reset_control *rstc; + struct rsnd_src_ctrl *src_ctrl; struct rsnd_src *src; struct clk *clk; int i, nr, ret; @@ -726,6 +736,12 @@ int rsnd_src_probe(struct rsnd_priv *priv) goto rsnd_src_probe_done; } + src_ctrl = devm_kzalloc(dev, sizeof(*src_ctrl), GFP_KERNEL); + if (!src_ctrl) { + ret = -ENOMEM; + goto rsnd_src_probe_done; + } + src = devm_kcalloc(dev, nr, sizeof(*src), GFP_KERNEL); if (!src) { ret = -ENOMEM; @@ -734,6 +750,28 @@ int rsnd_src_probe(struct rsnd_priv *priv) priv->src_nr = nr; priv->src = src; + priv->src_ctrl = src_ctrl; + + src_ctrl->scu = devm_clk_get_optional_enabled(dev, "scu"); + if (IS_ERR(src_ctrl->scu)) { + ret = dev_err_probe(dev, PTR_ERR(src_ctrl->scu), + "failed to get scu clock\n"); + goto rsnd_src_probe_done; + } + + src_ctrl->scu_x2 = devm_clk_get_optional_enabled(dev, "scu_x2"); + if (IS_ERR(src_ctrl->scu_x2)) { + ret = dev_err_probe(dev, PTR_ERR(src_ctrl->scu_x2), + "failed to get scu_x2 clock\n"); + goto rsnd_src_probe_done; + } + + src_ctrl->scu_supply = devm_clk_get_optional_enabled(dev, "scu_supply"); + if (IS_ERR(src_ctrl->scu_supply)) { + ret = dev_err_probe(dev, PTR_ERR(src_ctrl->scu_supply), + "failed to get scu_supply clock\n"); + goto rsnd_src_probe_done; + } i = 0; for_each_child_of_node_scoped(node, np) { @@ -754,6 +792,16 @@ int rsnd_src_probe(struct rsnd_priv *priv) goto rsnd_src_probe_done; } + /* + * RZ/G3E uses a shared SCU reset controller for all SRC modules. + * R-Car platforms typically don't have SRC reset controls. + */ + rstc = devm_reset_control_get_optional_shared(dev, "scu"); + if (IS_ERR(rstc)) { + ret = PTR_ERR(rstc); + goto rsnd_src_probe_done; + } + clk = rsnd_devm_clk_get_indexed(dev, SRC_NAME, i); if (IS_ERR(clk)) { ret = PTR_ERR(clk); @@ -761,7 +809,7 @@ int rsnd_src_probe(struct rsnd_priv *priv) } ret = rsnd_mod_init(priv, rsnd_mod_get(src), - &rsnd_src_ops, clk, NULL, RSND_MOD_SRC, i); + &rsnd_src_ops, clk, rstc, RSND_MOD_SRC, i); if (ret) goto rsnd_src_probe_done; -- 2.25.1