From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8DF47386553 for ; Wed, 13 May 2026 19:22:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778700122; cv=none; b=blGdzh0yQ4RQu5C4wPebrvJte87ZmkyupYsb9t/tpQnm5Y1NFEQrb0/Vb6bg86QRM5rMmq5xNyHodK807g5mlqZe3PwerbOYJ5XHy+g6nPvy2UGzgeUvCCwhAeQNdn7xKMylIKbF3PIcTiqgs3epwOP7sSKGwqbBtTnO7vUOcCQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778700122; c=relaxed/simple; bh=XF03iY5/U9AesliWpqIit5eIC5jyJLz2T7sgVTcrVws=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=k91P+OYmEuQ1DhYmDPpUCBzY3xemMsKfC7Y9c5VjMpzWpQ6RXGaYYR68ovzCjBLagUZBoPVnsJi7m+Xm3qn1M1Kx2pv75sBWe5BkIAuepILGl5AY8hFKXPFix6SZrlqdiYgcPf4uzfczV8ZOrrXErogDXfYf0LubhiQKvHceiBc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OryyOlDO; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OryyOlDO" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E9D97C19425; Wed, 13 May 2026 19:22:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778700122; bh=XF03iY5/U9AesliWpqIit5eIC5jyJLz2T7sgVTcrVws=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=OryyOlDOfc6FvZWUDMpNZ3s5CSiYeK9QwdeLGYvHig0H5nsP7UOhCabee5aQUIF/A cwUC9QtJl4Pt0jkcCySf3lWHmwGfUsKVYamOL6CXPa+pULdw2R2IIAz4vK9UfrkG+B iZ2loj35Rl8B4xNLCFiCiOOHf7xd7MiCyqPjzTrEiUQpP7h1BOS3yrCnu0ZE31aRgs kggd1gZU/SXK6XrdApCEs1SdQs1mB+Zic3AEITnF4hBsCbDNXDhi72eAzzfFRutpng bAR77pbDZaGzk+wL0Tyh5gcqz0YegyOFIn5DIGBKkI0ULjGm9BDTP0rY76enHbm6fS FOJ2Qb8xwQ5Yw== From: Lorenzo Bianconi Date: Wed, 13 May 2026 21:21:37 +0200 Subject: [PATCH v2 2/2] arm64: dts: Add Airoha AN7583 SoC and AN7583 Evaluation Board Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260513-airoha-7583-v2-2-ee0d82b37ce7@kernel.org> References: <20260513-airoha-7583-v2-0-ee0d82b37ce7@kernel.org> In-Reply-To: <20260513-airoha-7583-v2-0-ee0d82b37ce7@kernel.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Felix Fietkau , John Crispin , Matthias Brugger , AngeloGioacchino Del Regno Cc: Christian Marangi , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Lorenzo Bianconi X-Mailer: b4 0.14.3 Introduce the Airoha AN7583 SoC's dtsi and the Airoha AN7583 Evaluation Board's dts file. Signed-off-by: Lorenzo Bianconi --- arch/arm64/boot/dts/airoha/Makefile | 2 +- arch/arm64/boot/dts/airoha/an7583-evb.dts | 23 ++++++ arch/arm64/boot/dts/airoha/an7583.dtsi | 133 ++++++++++++++++++++++++++++++ 3 files changed, 157 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/airoha/Makefile b/arch/arm64/boot/dts/airoha/Makefile index ebea112ce1d7..6027978a35c2 100644 --- a/arch/arm64/boot/dts/airoha/Makefile +++ b/arch/arm64/boot/dts/airoha/Makefile @@ -1,2 +1,2 @@ # SPDX-License-Identifier: GPL-2.0-only -dtb-$(CONFIG_ARCH_AIROHA) += en7581-evb.dtb +dtb-$(CONFIG_ARCH_AIROHA) += en7581-evb.dtb an7583-evb.dtb diff --git a/arch/arm64/boot/dts/airoha/an7583-evb.dts b/arch/arm64/boot/dts/airoha/an7583-evb.dts new file mode 100644 index 000000000000..fa260f6e41c1 --- /dev/null +++ b/arch/arm64/boot/dts/airoha/an7583-evb.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/dts-v1/; + +#include "an7583.dtsi" + +/ { + model = "Airoha AN7583 Evaluation Board"; + compatible = "airoha,an7583-evb", "airoha,an7583"; + + aliases { + serial0 = &uart1; + }; + + chosen { + bootargs = "console=ttyS0,115200 earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x20000000>; + }; +}; diff --git a/arch/arm64/boot/dts/airoha/an7583.dtsi b/arch/arm64/boot/dts/airoha/an7583.dtsi new file mode 100644 index 000000000000..a82ed916e61d --- /dev/null +++ b/arch/arm64/boot/dts/airoha/an7583.dtsi @@ -0,0 +1,133 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + +#include +#include + +/ { + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + atf@80000000 { + no-map; + reg = <0x0 0x80000000 0x0 0x200000>; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + + core1 { + cpu = <&cpu1>; + }; + }; + }; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + l2: l2-cache { + compatible = "cache"; + cache-size = <0x80000>; + cache-line-size = <64>; + cache-level = <2>; + cache-unified; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&gic>; + interrupts = , + , + , + ; + }; + + clk25m: clock-25000000 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + clock-output-names = "clkxtal"; + }; + + i2c_clock: clock-20000000 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <20000000>; + clock-output-names = "i2c_clock"; + }; + + sys_hclk: clock-100000000 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "sys_hclk"; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gic: interrupt-controller@9000000 { + compatible = "arm,gic-v3"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x0 0x09000000 0x0 0x20000>, + <0x0 0x09080000 0x0 0x80000>, + <0x0 0x09400000 0x0 0x2000>, + <0x0 0x09500000 0x0 0x2000>, + <0x0 0x09600000 0x0 0x20000>; + interrupts = ; + }; + + uart1: serial@1fbf0000 { + compatible = "ns16550a"; + reg = <0x0 0x1fbf0000 0x0 0x30>; + reg-io-width = <4>; + reg-shift = <2>; + interrupts = ; + clock-frequency = <1843200>; + }; + + watchdog@1fbf0100 { + compatible = "airoha,an7583-wdt", "airoha,en7581-wdt"; + reg = <0x0 0x1fbf0100 0x0 0x38>; + + clocks = <&sys_hclk>; + clock-names = "bus"; + }; + }; +}; -- 2.54.0