From: sashiko-bot@kernel.org
To: Prabhakar <prabhakar.csengg@gmail.com>
Cc: krzk+dt@kernel.org, conor+dt@kernel.org,
devicetree@vger.kernel.org, wsa+renesas@sang-engineering.com,
robh@kernel.org, linux-watchdog@vger.kernel.org
Subject: Re: [RFC PATCH 5/9] dt-bindings: watchdog: renesas,r9a09g057-wdt: Add SYS syscon support
Date: Wed, 13 May 2026 01:44:49 +0000 [thread overview]
Message-ID: <20260513014449.C7DB9C2BCB0@smtp.kernel.org> (raw)
In-Reply-To: <20260511185058.1926869-6-prabhakar.mahadev-lad.rj@bp.renesas.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The deprecation message instructs users to pass a register offset via the `renesas,sys` property, which directly contradicts the property's definition that explicitly expects an IP instance index.
--
commit 2f7ddc85a4b879b8b32b8404088f4fafc9c07fd0
Author: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
dt-bindings: watchdog: renesas,r9a09g057-wdt: Add SYS syscon support
On the Renesas RZ/T2H SoC, the Watchdog Timer Control Register (WDTDCR) resides
within the System Controller (SYS) block rather than the WDT address space
itself. This commit introduces the renesas,sys phandle-array property to allow
the WDT driver to access its control register via the system controller and
deprecates the use of a second reg entry.
> diff --git a/Documentation/devicetree/bindings/watchdog/renesas,r9a09g057-wdt.yaml b/Documentation/devicetree/bindings/watchdog/renesas,r9a09g057-wdt.yaml
> index 099200c4f1364..2f32c7401def0 100644
> --- a/Documentation/devicetree/bindings/watchdog/renesas,r9a09g057-wdt.yaml
> +++ b/Documentation/devicetree/bindings/watchdog/renesas,r9a09g057-wdt.yaml
> @@ -48,6 +48,17 @@ properties:
> resets:
> maxItems: 1
>
> + renesas,sys:
> + description:
> + System controller registers control the start/stop of the WDT, and halt debug.
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + items:
> + - items:
> + - description: phandle to system controller
> + - description: watchdog IP instance index
> + minimum: 0
> + maximum: 5
> +
[ ... ]
> else:
> properties:
> clocks:
> maxItems: 1
> clock-names:
> maxItems: 1
> - reg:
> - minItems: 2
> resets: false
> + allOf:
> + - if:
> + required:
> + - renesas,sys
> + then:
> + properties:
> + reg:
> + maxItems: 1
> + else:
> + properties:
> + reg:
> + description: Deprecated. Use renesas,sys to pass the offset
> + of WDTDCR register instead.
Is this description accurate?
The description instructs users to use renesas,sys to pass the offset of the
WDTDCR register, but the definition of renesas,sys above explicitly expects the
watchdog IP instance index, bounded between 0 and 5.
Does this conflicting information need to be updated so users do not mistakenly
pass register offsets and cause device tree schema validation failures?
> + minItems: 2
> + deprecated: true
>
> additionalProperties: false
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260511185058.1926869-1-prabhakar.mahadev-lad.rj@bp.renesas.com?part=5
next prev parent reply other threads:[~2026-05-13 1:44 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-11 18:50 [RFC PATCH 0/9] Add System Controller support for RZ/T2H and RZ/N2H SoCs Prabhakar
2026-05-11 18:50 ` [RFC PATCH 1/9] dt-bindings: clock: renesas,cpg-mssr: Support RZ/T2H system controllers Prabhakar
2026-05-12 22:48 ` sashiko-bot
2026-05-11 18:50 ` [RFC PATCH 2/9] clk: renesas: r9a09g077: Add SYSC regmap support Prabhakar
2026-05-13 0:12 ` sashiko-bot
2026-05-11 18:50 ` [RFC PATCH 3/9] arm64: dts: renesas: r9a09g077: Add system controller child nodes Prabhakar
2026-05-11 18:50 ` [RFC PATCH 4/9] arm64: dts: renesas: r9a09g087: " Prabhakar
2026-05-11 18:50 ` [RFC PATCH 5/9] dt-bindings: watchdog: renesas,r9a09g057-wdt: Add SYS syscon support Prabhakar
2026-05-13 1:44 ` sashiko-bot [this message]
2026-05-11 18:50 ` [RFC PATCH 6/9] watchdog: rzv2h: Refactor WDTDCR start/stop handling Prabhakar
2026-05-11 18:50 ` [RFC PATCH 7/9] watchdog: rzv2h: Add syscon support for RZ/T2H and RZ/N2H WDT control register Prabhakar
2026-05-13 2:27 ` sashiko-bot
2026-05-11 18:50 ` [RFC PATCH 8/9] arm64: dts: renesas: r9a09g077: Use SYS syscon for WDTDCR access Prabhakar
2026-05-13 2:55 ` sashiko-bot
2026-05-11 18:50 ` [RFC PATCH 9/9] arm64: dts: renesas: r9a09g087: " Prabhakar
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