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[2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5a90f11a682sm1265079e87.31.2026.05.15.04.48.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 May 2026 04:48:13 -0700 (PDT) From: Dmitry Baryshkov Date: Fri, 15 May 2026 14:48:02 +0300 Subject: [PATCH v3 03/16] media: iris: Introduce set_preset_register as a vpu_op Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260515-iris-ar50lt-v3-3-df3846e74347@oss.qualcomm.com> References: <20260515-iris-ar50lt-v3-0-df3846e74347@oss.qualcomm.com> In-Reply-To: <20260515-iris-ar50lt-v3-0-df3846e74347@oss.qualcomm.com> To: Vikash Garodia , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vishnu Reddy Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Dikshita Agarwal X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=4447; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=yjv3YSjey6H8VPHigK1PHGPXENr2QgLaW8YDZ/WLE3w=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBqBwf0grR79YTEqtux1xHVvJisDhvDATyliQ8BX e93M8/CNXOJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCagcH9AAKCRCLPIo+Aiko 1ULSB/41CiUjd7G1MgpWsJcX+OdLldopRQ5Rh+PTUoHjmFyuqnK/BmFC9JIH+yEBGPamigEzZgN 0Pt/qD0PYq0GK3spYRduyeZAzTTEUGmhWrfY69mdLoFGgQDUCPRr4pSuJYwGTltu30TEzspmqQP aXRoWQf8oAzH1165C3M/dr2Eg/01ZbDYc8HvQhZQMzVytpDGfi0PwwOc4tRNE2dWeA93a0z/56f 7LeFpCqexk6RzqnWPYU7+ODQ8Pdzv8ofPxy9BXtzoIyfy3fnkJYVnt7q2N1wU6TgK9VGx+7RpNO pw5VDy+j8IqVIeW2QG5yEYqdPcAntfGy/aHcrtJXMybLYP+D X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-GUID: 5pEbS8TpC-IoFXAPywBW_QtCIRU0-0VP X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE1MDExOSBTYWx0ZWRfX/5j6U2y1VKqK F5xECoqvzc8KnQvra/aD30TI/QZcRST3AnT5awJdCh8XvdoNYgiHDhuRX4Eet+5xJYFE9v+eumK qAirYHfaAfYBcfNEge1kJ4qNg+t+MB3mg8xY4NGfsKzWO8izzl9y28nRIYM7an/GvkGZPItI8Xv dtIUO64d4PGSVLm2O0S94iZO/Az6wKuXv/XRt002rYMHKMHsri+ZpdBYqteGxSQ9p1o0kU1OnRG TXC6DMG8SF1uExW8aF5MsmVIs1j39g13d4CcetvsjEwF9DEdnMTicCVveg7ab9hlcKYDrT8Nfgn a4xzG9Qn1G9/2WXQlUnXrq7eewHRzYteeJzEJnhJHgRqU+XxErupjx/7IWJTEM9l4pltOSj2S3W 3cnqJnNKDZNkix8XA8A31byYVSNmmeCpoPmq8BGXTsneBT1KLub09ZwlfenMEP66clqrWUm5vbU xS0rQqJGgW/Vh99OHAQ== X-Proofpoint-ORIG-GUID: 5pEbS8TpC-IoFXAPywBW_QtCIRU0-0VP X-Authority-Analysis: v=2.4 cv=JPELdcKb c=1 sm=1 tr=0 ts=6a070800 cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=4Uh0hlRDs2lXuULb_e4A:9 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-15_02,2026-05-13_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 clxscore=1015 phishscore=0 priorityscore=1501 spamscore=0 malwarescore=0 suspectscore=0 impostorscore=0 adultscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605150119 From: Dikshita Agarwal The set_preset_registers sequence is currently shared across all supported devices. Starting with Qualcomm QCM2290 (AR50LT), the register programming would differ. Move set_preset_register into a vpu_op to allow per-device customization. This change prepares the driver for upcoming hardware variants. No functional change so far for existing devices. Reviewed-by: Dmitry Baryshkov Signed-off-by: Dikshita Agarwal Reviewed-by: Vishnu Reddy Reviewed-by: Vikash Garodia Signed-off-by: Dmitry Baryshkov --- drivers/media/platform/qcom/iris/iris_vpu2.c | 1 + drivers/media/platform/qcom/iris/iris_vpu3x.c | 3 +++ drivers/media/platform/qcom/iris/iris_vpu4x.c | 1 + drivers/media/platform/qcom/iris/iris_vpu_common.c | 2 +- drivers/media/platform/qcom/iris/iris_vpu_common.h | 1 + 5 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/iris/iris_vpu2.c b/drivers/media/platform/qcom/iris/iris_vpu2.c index 01ef40f38957..d61902c9a213 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu2.c +++ b/drivers/media/platform/qcom/iris/iris_vpu2.c @@ -45,4 +45,5 @@ const struct vpu_ops iris_vpu2_ops = { .power_on_controller = iris_vpu_power_on_controller, .calc_freq = iris_vpu2_calc_freq, .set_hwmode = iris_vpu_set_hwmode, + .set_preset_registers = iris_vpu_set_preset_registers, }; diff --git a/drivers/media/platform/qcom/iris/iris_vpu3x.c b/drivers/media/platform/qcom/iris/iris_vpu3x.c index 3dad47be78b5..dc02ced1b931 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu3x.c +++ b/drivers/media/platform/qcom/iris/iris_vpu3x.c @@ -261,6 +261,7 @@ const struct vpu_ops iris_vpu3_ops = { .power_on_controller = iris_vpu_power_on_controller, .calc_freq = iris_vpu3x_vpu4x_calculate_frequency, .set_hwmode = iris_vpu_set_hwmode, + .set_preset_registers = iris_vpu_set_preset_registers, }; const struct vpu_ops iris_vpu33_ops = { @@ -270,6 +271,7 @@ const struct vpu_ops iris_vpu33_ops = { .power_on_controller = iris_vpu_power_on_controller, .calc_freq = iris_vpu3x_vpu4x_calculate_frequency, .set_hwmode = iris_vpu_set_hwmode, + .set_preset_registers = iris_vpu_set_preset_registers, }; const struct vpu_ops iris_vpu35_ops = { @@ -280,4 +282,5 @@ const struct vpu_ops iris_vpu35_ops = { .program_bootup_registers = iris_vpu35_vpu4x_program_bootup_registers, .calc_freq = iris_vpu3x_vpu4x_calculate_frequency, .set_hwmode = iris_vpu_set_hwmode, + .set_preset_registers = iris_vpu_set_preset_registers, }; diff --git a/drivers/media/platform/qcom/iris/iris_vpu4x.c b/drivers/media/platform/qcom/iris/iris_vpu4x.c index 02e100a4045f..f608a297d4a3 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu4x.c +++ b/drivers/media/platform/qcom/iris/iris_vpu4x.c @@ -368,4 +368,5 @@ const struct vpu_ops iris_vpu4x_ops = { .program_bootup_registers = iris_vpu35_vpu4x_program_bootup_registers, .calc_freq = iris_vpu3x_vpu4x_calculate_frequency, .set_hwmode = iris_vpu4x_set_hwmode, + .set_preset_registers = iris_vpu_set_preset_registers, }; diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.c b/drivers/media/platform/qcom/iris/iris_vpu_common.c index 7bba3b6209c2..ff0070c85ccf 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_common.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.c @@ -472,7 +472,7 @@ int iris_vpu_power_on(struct iris_core *core) iris_opp_set_rate(core->dev, freq); - iris_vpu_set_preset_registers(core); + core->iris_platform_data->vpu_ops->set_preset_registers(core); iris_vpu_interrupt_init(core); core->intr_status = 0; diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.h b/drivers/media/platform/qcom/iris/iris_vpu_common.h index 09799a375c14..21ed4c9bd5e3 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_common.h +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.h @@ -22,6 +22,7 @@ struct vpu_ops { void (*program_bootup_registers)(struct iris_core *core); u64 (*calc_freq)(struct iris_inst *inst, size_t data_size); int (*set_hwmode)(struct iris_core *core); + void (*set_preset_registers)(struct iris_core *core); }; int iris_vpu_boot_firmware(struct iris_core *core); -- 2.47.3