From: sashiko-bot@kernel.org
To: "Konrad Dybcio" <konradybcio@kernel.org>
Cc: conor+dt@kernel.org, neil.armstrong@linaro.org,
devicetree@vger.kernel.org, olteanv@gmail.com, vkoul@kernel.org,
linux-phy@lists.infradead.org, robh@kernel.org
Subject: Re: [PATCH 1/5] dt-bindings: phy: qcom,qmp-usb3-dp: Extend X1E description for USB4
Date: Mon, 18 May 2026 10:47:53 +0000 [thread overview]
Message-ID: <20260518104753.F0F5DC2BCC6@smtp.kernel.org> (raw)
In-Reply-To: <20260518-topic-usb4phy-v1-1-71d827c49dca@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The binding incorrectly relaxes clock constraints by grouping 'x1e80100' with 'sc7180' and 'sdm845' and globally changing the 5th 'clock-names' item to an enum.
--
commit 54d1f0fd2346d0dbf486ca5212767ad33f59fde0
Author: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
dt-bindings: phy: qcom,qmp-usb3-dp: Extend X1E description for USB4
This commit extends the QMP combo PHY binding for X1E80100 to support USB4
communication. It updates the schema to allow a new clock, P2RR2P, which is
required for switching to USB4 mode, and adds a corresponding definition.
> diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
> --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
> @@ -52,7 +52,7 @@ properties:
> - const: ref
> - const: com_aux
> - const: usb3_pipe
> - - const: cfg_ahb
> + - enum: [ p2rr2p_pipe, cfg_ahb ]
Does this global enum change inadvertently relax the constraint for all
variants?
It appears that older variants which previously strictly required cfg_ahb
could now pass schema validation using p2rr2p_pipe instead, and vice versa.
[ ... ]
> @@ -186,6 +186,7 @@ allOf:
> enum:
> - qcom,sc7180-qmp-usb3-dp-phy
> - qcom,sdm845-qmp-usb3-dp-phy
> + - qcom,x1e80100-qmp-usb3-dp-phy
> then:
> properties:
> clocks:
Should x1e80100 be placed in its own if/then block?
Grouping x1e80100 with sc7180 and sdm845 means the schema only enforces the
maximum number of items, but doesn't strictly tie the 5th clock to the
specific hardware generation. A separate block would ensure x1e80100 is
restricted to p2rr2p_pipe, while the older variants remain restricted to
cfg_ahb.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260518-topic-usb4phy-v1-0-71d827c49dca@oss.qualcomm.com?part=1
next prev parent reply other threads:[~2026-05-18 10:47 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-18 10:29 [PATCH 0/5] USB4 mode programming for QMMPHY on X1E Konrad Dybcio
2026-05-18 10:29 ` [PATCH 1/5] dt-bindings: phy: qcom,qmp-usb3-dp: Extend X1E description for USB4 Konrad Dybcio
2026-05-18 10:47 ` sashiko-bot [this message]
2026-05-18 10:29 ` [PATCH 2/5] phy: core: Define TBT phy_mode Konrad Dybcio
2026-05-18 11:03 ` sashiko-bot
2026-05-18 12:25 ` Dmitry Baryshkov
2026-05-18 12:29 ` Konrad Dybcio
2026-05-18 15:19 ` Dmitry Baryshkov
2026-05-18 10:29 ` [PATCH 3/5] phy: qualcomm: qmp-combo: Add preliminary USB4 support Konrad Dybcio
2026-05-18 11:32 ` sashiko-bot
2026-05-18 13:57 ` Dmitry Baryshkov
2026-05-18 14:15 ` Konrad Dybcio
2026-05-18 15:38 ` Dmitry Baryshkov
2026-05-19 8:12 ` Konrad Dybcio
2026-05-18 10:29 ` [PATCH 4/5] phy: qualcomm: qmp-combo: Add USB4/TBT3 configuration data for Hamoa Konrad Dybcio
2026-05-18 11:49 ` sashiko-bot
2026-05-18 10:29 ` [PATCH 5/5] arm64: dts: qcom: hamoa: Extend QMPPHY description for USB4 Konrad Dybcio
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