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[79.22.5.99]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-45d9ec39806sm53639804f8f.9.2026.05.20.08.09.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 May 2026 08:09:28 -0700 (PDT) From: Christian Marangi To: Michael Turquette , Stephen Boyd , Brian Masney , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Christian Marangi , Vinod Koul , Neil Armstrong , Lorenzo Bianconi , Felix Fietkau , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org Subject: [PATCH v8 0/5] airoha: an7581: USB support Date: Wed, 20 May 2026 17:09:05 +0200 Message-ID: <20260520150912.11614-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.53.0 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This is a major rework of the old v2 series. The SoC always support USB 2.0 but for USB 3.0 it needs additional configuration for the Serdes port. Such port can be either configured for USB usage or for PCIe lines or HSGMII and these are configured in the SCU space. The previous implementation of a dedicated SSR driver was too complex and fragile for the simple task of configuring a register hence it was dropped and the handling is entirely in the PHY driver. Everything was reducted to the dt-bindings to describe the Serdes line. Also the property for the PHY are renamed to a more suitable name and everything is now mandatory to simplify the implementation. (the PHY are always present and active on the SoC) Also other unrelated patch are dropped from this series. Changes v8: - Squash header to clk Documentation patch - Address comments from AI Bot Changes v7: - Rework to double PHY implementation (suggested by Rob) Now the clk driver expose a PHY for Serdes port USB PHY driver selects it - Rebase on top of linux-next Link: https://lore.kernel.org/all/20260306190156.22297-1-ansuelsmth@gmail.com/ Changes v6: - Fix kernel test robot (sparse warning) Link: https://lore.kernel.org/all/20260306190156.22297-1-ansuelsmth@gmail.com/ Changes v5: - Add Ack and Review tag from Connor - Implement Ethernet support in the USB driver (testing support for this Serdes on a special reference board) - Use an7581 prefix for USB PHY driver Link: https://lore.kernel.org/all/20251107160251.2307088-1-ansuelsmth@gmail.com/ Changes v4: - Rename PCIe and USB PHY to AN7581 - Drop airoha,scu (handled directly in driver) - Drop dt-bindings for monitor clock in favor of raw values - Better describe the usage of airoha,usb3-serdes - Simplify values of dt-bindings SSR SERDES Link: https://lore.kernel.org/all/20251107160251.2307088-1-ansuelsmth@gmail.com/ Changes v3: - Drop clk changes - Drop SSR driver - Rename property in Documentation - Simplify PHY handling - Move SSR handling inside the PHY driver Link: https://lore.kernel.org/all/20251029173713.7670-1-ansuelsmth@gmail.com/ Changes v2: - Drop changes for simple-mfd - Rework PHY node structure to single node - Drop port-id property in favor of serdes-port and usb2-monitor-clock-sel - Make the SSR driver probe from the clock driver Christian Marangi (5): dt-bindings: clock: airoha: Add PHY binding for Serdes port dt-bindings: phy: Add documentation for Airoha AN7581 USB PHY clk: en7523: Add support for selecting the Serdes port in SCU phy: move and rename Airoha PCIe PHY driver to dedicated directory phy: airoha: Add support for Airoha AN7581 USB PHY .../bindings/clock/airoha,en7523-scu.yaml | 9 + .../bindings/phy/airoha,an7581-usb-phy.yaml | 62 ++ MAINTAINERS | 11 +- drivers/clk/Kconfig | 1 + drivers/clk/clk-en7523.c | 216 ++++++- drivers/phy/Kconfig | 11 +- drivers/phy/Makefile | 4 +- drivers/phy/airoha/Kconfig | 24 + drivers/phy/airoha/Makefile | 4 + .../phy-an7581-pcie-regs.h} | 2 +- .../phy-an7581-pcie.c} | 6 +- drivers/phy/airoha/phy-an7581-usb.c | 554 ++++++++++++++++++ include/dt-bindings/soc/airoha,scu-ssr.h | 11 + 13 files changed, 894 insertions(+), 21 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/airoha,an7581-usb-phy.yaml create mode 100644 drivers/phy/airoha/Kconfig create mode 100644 drivers/phy/airoha/Makefile rename drivers/phy/{phy-airoha-pcie-regs.h => airoha/phy-an7581-pcie-regs.h} (99%) rename drivers/phy/{phy-airoha-pcie.c => airoha/phy-an7581-pcie.c} (99%) create mode 100644 drivers/phy/airoha/phy-an7581-usb.c create mode 100644 include/dt-bindings/soc/airoha,scu-ssr.h -- 2.53.0