Re: [PATCH v5 2/3] arm64: dts: imx95: Add dma, intr, aer and pme interrupts for PCIe

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] The pcie0 node is missing the msi-map-mask property, which can cause MSI mapping failures for downstream devices on higher bus numbers.
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commit 0e2b46336a5b22c94438abb01ead59266994b86b
Author: Richard Zhu <hongxing.zhu@nxp.com>

arm64: dts: imx95: Add dma, intr, aer and pme interrupts for PCIe

This commit updates the device tree configurations for pcie0 and pcie1
on imx95 to include additional interrupts for dma, intr, aer, and pme.
These new interrupt definitions enable advanced PCIe functionality beyond
basic MSI support.

> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index 71394871d8dd0..6896d9c15bf53 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -1861,8 +1861,12 @@ pcie0: pcie@4c300000 {
>  			bus-range = <0x00 0xff>;
>  			num-lanes = <1>;
>  			num-viewport = <8>;
> -			interrupts = <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>;
> -			interrupt-names = "msi";
> +			interrupts = <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "msi", "dma", "intr", "aer", "pme";

[Severity: High]
This is a pre-existing issue, but I noticed the pcie0 node is missing an
msi-map-mask property. The node defines an iommu-map-mask but lacks a
corresponding msi-map-mask.

Without msi-map-mask, of_map_id() applies a default mask of 0xffffffff to
the PCI requestor ID during MSI allocation. If a PCIe switch is connected
and downstream devices are enumerated on a bus number >= 2, their requestor
IDs (e.g., 0x200, 0x300) might fail to match the defined msi-map entries
which only cover 0x0 and 0x100 ranges.

Could this cause of_map_id to bypass translation, leaving the msi domain
unassigned and breaking MSI functionality for downstream topologies beyond
the first bus?

[ ... ]

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Sashiko AI review · https://sashiko.dev/#/patchset/20260521093255.61585-1-hongxing.zhu@nxp.com?part=2