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From: sashiko-bot@kernel.org
To: "Jun Nie" <jun.nie@linaro.org>
Cc: devicetree@vger.kernel.org, conor+dt@kernel.org, robh@kernel.org
Subject: Re: [PATCH v4 3/5] drm/msm/dsi: Support dual panel use case with single CRTC
Date: Thu, 21 May 2026 15:50:54 +0000	[thread overview]
Message-ID: <20260521155055.245961F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260521-sm8650-7-1-bonded-dsi-v4-3-a4dd5e0850f1@linaro.org>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Halving `dsc->pic_width` for dual panels causes the DPU DSC encoder to incorrectly program the DSC hardware, resulting in a halved processing width and hardware underflow.
--

commit d23a05783cbe32106f4e17b417f7304f721a2609
Author: Jun Nie <jun.nie@linaro.org>

drm/msm/dsi: Support dual panel use case with single CRTC

This commit adds support for a hardware configuration where two independent
DSI panels are driven by a single, synchronous CRTC. The driver halves the
CRTC's horizontal resolution before configuring the DSI host and any DSC
encoders to ensure each panel receives the proper half of the framebuffer.

> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
> index 10589389650fc..4a391cdd4030a 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
[ ... ]
> @@ -1024,7 +1025,10 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
>  			return;
>  		}
>  
> -		dsc->pic_width = mode->hdisplay;
> +		if (msm_host->is_dual_panel)
> +			dsc->pic_width = hdisplay;
> +		else
> +			dsc->pic_width = mode->hdisplay;

[Severity: High]
Can setting dsc->pic_width to the halved hdisplay cause the DPU DSC encoder
to incorrectly program the hardware?

The struct drm_dsc_config is shared with the DPU encoder driver, which expects
dsc->pic_width to represent the total picture width across all DSC encoders
for the CRTC.

If the DPU driver calculates the encoder processing width by dividing this
value by num_dsc (which is 2 for a dual DSI setup), won't this result in a
processing width that is a quarter of the total CRTC width? 

This looks like it could lead to incorrect pipeline delay calculations and
cause the hardware to process only half the intended width, potentially
leading to display corruption and hardware pipeline underflows.

>  		dsc->pic_height = mode->vdisplay;
>  		DBG("Mode %dx%d\n", dsc->pic_width, dsc->pic_height);
>

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260521-sm8650-7-1-bonded-dsi-v4-0-a4dd5e0850f1@linaro.org?part=3

  reply	other threads:[~2026-05-21 15:50 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-21 14:46 [PATCH v4 0/5] Add support to 2 panels in bonded-DSI mode Jun Nie
2026-05-21 14:46 ` [PATCH v4 1/5] drm/msm/dsi: support DSC configurations with slice_per_pkt > 1 Jun Nie
2026-05-21 15:08   ` sashiko-bot
2026-05-21 14:46 ` [PATCH v4 2/5] drm/mipi-dsi: Add flag to support dual-panel configurations Jun Nie
2026-05-21 15:20   ` sashiko-bot
2026-05-21 14:46 ` [PATCH v4 3/5] drm/msm/dsi: Support dual panel use case with single CRTC Jun Nie
2026-05-21 15:50   ` sashiko-bot [this message]
2026-05-21 14:46 ` [PATCH v4 4/5] dt-bindings: display: Add Synaptics R63455 panel support Jun Nie
2026-05-21 16:07   ` sashiko-bot
2026-05-21 19:45   ` Conor Dooley
2026-05-21 20:24   ` Dmitry Baryshkov
2026-05-21 20:46   ` Rob Herring (Arm)
2026-05-21 14:46 ` [PATCH v4 5/5] drm/panel: Add driver for Synaptics R63455 DSI panel Jun Nie
2026-05-21 16:30   ` sashiko-bot

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