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From: sashiko-bot@kernel.org
To: "Svyatoslav Ryhel" <clamor95@gmail.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v2 1/2] dt-bindings: soc: tegra: Document Nvidia Tegra modem pwrseq
Date: Sat, 23 May 2026 09:00:31 +0000	[thread overview]
Message-ID: <20260523090032.AAFA91F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260523085102.51000-2-clamor95@gmail.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Modeling a software power sequence as a virtual standalone device tree node, bypassing physical bus topology.
--

commit 5baacde1b782878f582e887bcf988caf135487f5
Author: Svyatoslav Ryhel <clamor95@gmail.com>

dt-bindings: soc: tegra: Document Nvidia Tegra modem pwrseq

This commit documents the Tegra modem power sequence configuration. It provides
a node to manage interaction between the application processor and the modem,
including control over the USB lines.

> diff --git a/Documentation/devicetree/bindings/soc/tegra/nvidia,tegra-modem-pwrseq.yaml b/Documentation/devicetree/bindings/soc/tegra/nvidia,tegra-modem-pwrseq.yaml
> new file mode 100644
> index 0000000000000..3770fd6dc2cf9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/tegra/nvidia,tegra-modem-pwrseq.yaml
[ ... ]
> +properties:
> +  compatible:
> +    const: nvidia,tegra-modem-pwrseq
> +
> +  enable-gpios:
> +    description: GPIO connected to the modem EINT1 pin
> +    maxItems: 1
> +
> +  nvidia,usb-bus:
> +    description:
> +      Contains phandle pointing to the Host's USB controller
> +    $ref: /schemas/types.yaml#/definitions/phandle

[Severity: High]
Does this binding model a software power sequence rather than the physical
hardware layout?

The device tree typically describes physical topology. Under standard bus
architecture, would a USB-connected modem be modeled as a child node under
the corresponding USB controller or hub port, including its required
power-supplies and enable-gpios as properties of that physical child node?

By introducing a standalone virtual node that points backwards to the USB
controller via the nvidia,usb-bus phandle, does this bypass the driver core's
standard bus hierarchy and device link management?

Without a structural dependency established through device links, if the USB
controller driver is unbound, could the power sequencer retain a dangling
pointer to the USB bus device and trigger a use-after-free during the next
enable or disable sequence?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260523085102.51000-1-clamor95@gmail.com?part=1

  reply	other threads:[~2026-05-23  9:00 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-23  8:51 [PATCH v2 0/2] power: sequencing: Add support for Nvidia Tegra modem pwrseq Svyatoslav Ryhel
2026-05-23  8:51 ` [PATCH v2 1/2] dt-bindings: soc: tegra: Document " Svyatoslav Ryhel
2026-05-23  9:00   ` sashiko-bot [this message]
2026-05-23  8:51 ` [PATCH v2 2/2] power: sequencing: Add support for " Svyatoslav Ryhel
2026-05-23  9:30   ` sashiko-bot

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