From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97B5539A80E; Mon, 25 May 2026 09:24:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779701098; cv=none; b=kiToD2E3pm7T0v4ByOGcNAk3LeAgcp46NROTXCR7BHUlQT++H8e/NkfI0Eby3OWPEqqb2/6pAw7oqtfOZFQG1rhXDCBuU53J68f5wTSePirZoqSgYsShllowxiUaYM6iKbk//8BtM8UqebqjMKwDWsM17YwKKAfJpx0jEqzoTaA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779701098; c=relaxed/simple; bh=pKstJqIbxk0Ue2zAoMPdklquNi0PqQrfx/ZrdyDQFRs=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=m7lH2osAhc5MU3ufbY0cOYLa90Uc60jypgFQmewNzhW24a85g/VvZsUqiP6wcSkrfjMFwnIqT/G0Zv80/bi+jIFCYBMhdF005HcnF4xdw7WR3CYGFEugP3lBVkGHRIcahG7I4wKoYWFTR6+4uO7e+xOXrmajTEBRkI81KLannFU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=fTa9BAZP; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="fTa9BAZP" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1779701096; x=1811237096; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=pKstJqIbxk0Ue2zAoMPdklquNi0PqQrfx/ZrdyDQFRs=; b=fTa9BAZP0RTBgpW7cjxN8h3N2aiSK3KIw9auALGH17/QCDy6kqqz/aRM LAChX2W2yX7C/9uBaY0EuBXv7yHDb4vZb2kTExKu+6xZC4thAHN/autZp eO6tWIiLP2GOc9G2lWdZup9NLGHs0bztJBLQgiIxQYixklvcAY/n2X+f1 jOsPSGePVOHShQT8bU1BLRCORM2WvNt4eDBq7wvfVwLPZGxo30kiFbfk8 O6S8KZHZKGLGooawjAd/ip/9efdj5oJ7KH1t+VPc3GiBf6Y/BoMSVPGpp 75KawB47pBDe6t1uvlFvPko10n1eRh4ktvQ76PURdV34s75P4L1v9Bnl6 Q==; X-CSE-ConnectionGUID: XjipzVgLS1yUI+zFzoxh8A== X-CSE-MsgGUID: UR006FT3QhKmEXG5+z8Sxw== X-IronPort-AV: E=Sophos;i="6.24,167,1774335600"; d="scan'208";a="66842536" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 May 2026 02:24:55 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex4.mchp-main.com (10.10.87.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.41; Mon, 25 May 2026 02:24:55 -0700 Received: from che-lt-i67131.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 25 May 2026 02:24:47 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , , , , , , , , , , CC: Durai Manickam KR , "Manikandan Muralidharan" Subject: [PATCH v7 4/5] ARM: dts: microchip: add I3C controller Date: Mon, 25 May 2026 14:54:04 +0530 Message-ID: <20260525092405.1514213-5-manikandan.m@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260525092405.1514213-1-manikandan.m@microchip.com> References: <20260525092405.1514213-1-manikandan.m@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain From: Durai Manickam KR Add I3C controller for sama7d65 SoC. Signed-off-by: Durai Manickam KR Signed-off-by: Manikandan Muralidharan --- Changes in v3: - Remove clock-names property as the driver acquires and enables clocks in bulk using devm_clk_bulk_get_all_enabled arch/arm/boot/dts/microchip/sama7d65.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi index 67253bbc08df..ec200848c153 100644 --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi @@ -1055,5 +1055,13 @@ gic: interrupt-controller@e8c11000 { #address-cells = <0>; interrupt-controller; }; + + i3c: i3c@e9000000 { + compatible = "microchip,sama7d65-i3c-hci"; + reg = <0xe9000000 0x300>; + interrupts = ; + clocks = <&pmc PMC_TYPE_PERIPHERAL 105>, <&pmc PMC_TYPE_GCK 105>; + status = "disabled"; + }; }; }; -- 2.25.1